[2/4] pinctrl: amd: Drop pull up select configuration
Commit Message
pinctrl-amd currently tries to program bit 19 of all GPIOs to select
either a 4kΩ or 8hΩ pull up, but this isn't what bit 19 does. Bit
19 is marked as reserved, even in the latest platforms documentation.
Drop this programming functionality.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/pinctrl/pinctrl-amd.c | 16 ++++------------
drivers/pinctrl/pinctrl-amd.h | 1 -
2 files changed, 4 insertions(+), 13 deletions(-)
Comments
Fri, Jun 30, 2023 at 02:47:14PM -0500, Mario Limonciello kirjoitti:
> pinctrl-amd currently tries to program bit 19 of all GPIOs to select
> either a 4kΩ or 8hΩ pull up, but this isn't what bit 19 does. Bit
> 19 is marked as reserved, even in the latest platforms documentation.
>
> Drop this programming functionality.
Can it be that documentation is not (yet) updated?
Where, btw, did the original code come from? Perhaps it may shed some light
on this.
On 7/3/23 16:32, andy.shevchenko@gmail.com wrote:
> Fri, Jun 30, 2023 at 02:47:14PM -0500, Mario Limonciello kirjoitti:
>> pinctrl-amd currently tries to program bit 19 of all GPIOs to select
>> either a 4kΩ or 8hΩ pull up, but this isn't what bit 19 does. Bit
>> 19 is marked as reserved, even in the latest platforms documentation.
>>
>> Drop this programming functionality.
>
> Can it be that documentation is not (yet) updated?
>
No; I double checked documentation across products from last few years
as well as products to be coming out in the next few years and this bit
is consistently marked "Reserved".
> Where, btw, did the original code come from? Perhaps it may shed some light
> on this.
>
It's from the *very beginning* of the driver.
dbad75dd1f25 ("pinctrl: add AMD GPIO driver support.")
Original author isn't at AMD anymore, so I can't ask them.
I would guess that it was something that was discussed to be supported
but never actually was.
Maybe Shyam and Basavaraj have some other thoughts on this bit.
@@ -221,7 +221,6 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
char *pin_sts;
char *interrupt_sts;
char *wake_sts;
- char *pull_up_sel;
char *orientation;
char debounce_value[40];
char *debounce_enable;
@@ -329,14 +328,9 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
seq_printf(s, " %s|", wake_sts);
if (pin_reg & BIT(PULL_UP_ENABLE_OFF)) {
- if (pin_reg & BIT(PULL_UP_SEL_OFF))
- pull_up_sel = "8k";
- else
- pull_up_sel = "4k";
- seq_printf(s, "%s ↑|",
- pull_up_sel);
+ seq_puts(s, " ↑ |");
} else if (pin_reg & BIT(PULL_DOWN_ENABLE_OFF)) {
- seq_puts(s, " ↓|");
+ seq_puts(s, " ↓ |");
} else {
seq_puts(s, " |");
}
@@ -763,7 +757,7 @@ static int amd_pinconf_get(struct pinctrl_dev *pctldev,
break;
case PIN_CONFIG_BIAS_PULL_UP:
- arg = (pin_reg >> PULL_UP_SEL_OFF) & (BIT(0) | BIT(1));
+ arg = (pin_reg >> PULL_UP_ENABLE_OFF) & BIT(0);
break;
case PIN_CONFIG_DRIVE_STRENGTH:
@@ -810,10 +804,8 @@ static int amd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
break;
case PIN_CONFIG_BIAS_PULL_UP:
- pin_reg &= ~BIT(PULL_UP_SEL_OFF);
- pin_reg |= (arg & BIT(0)) << PULL_UP_SEL_OFF;
pin_reg &= ~BIT(PULL_UP_ENABLE_OFF);
- pin_reg |= ((arg>>1) & BIT(0)) << PULL_UP_ENABLE_OFF;
+ pin_reg |= (arg & BIT(0)) << PULL_UP_ENABLE_OFF;
break;
case PIN_CONFIG_DRIVE_STRENGTH:
@@ -36,7 +36,6 @@
#define WAKE_CNTRL_OFF_S4 15
#define PIN_STS_OFF 16
#define DRV_STRENGTH_SEL_OFF 17
-#define PULL_UP_SEL_OFF 19
#define PULL_UP_ENABLE_OFF 20
#define PULL_DOWN_ENABLE_OFF 21
#define OUTPUT_VALUE_OFF 22