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Fri, 30 Jun 2023 05:34:55 -0500 From: Evan Quan To: , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Evan Quan , Mario Limonciello Subject: [PATCH V5 7/9] drm/amd/pm: add flood detection for wbrf events Date: Fri, 30 Jun 2023 18:32:38 +0800 Message-ID: <20230630103240.1557100-8-evan.quan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230630103240.1557100-1-evan.quan@amd.com> References: <20230630103240.1557100-1-evan.quan@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT114:EE_|BL1PR12MB5029:EE_ X-MS-Office365-Filtering-Correlation-Id: 7833bc9d-7ec2-4e39-b6eb-08db7955b2eb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: jmqtBbdDxgjAY8+0rUz9iR0FpuCUlXPND42+8BKBc/67V7c96nvySjn9xFmgW2TWea1/srCOXyI2670QVcV2jk2Aihu7/xx1zLC2/CWvPnz6mxRGfcv+mnQcBGhbmyfoWAFumtSsPNBy5sEcW1f1+IZbi5IsKYUqhum5NnCyIv2aChLX9hD/7PHZ8in/Cu9CJ03NMTcoT2riBRLrZ0E4ABmmpqqf3SANfjV5wfrTK31kJq0P+8HYAv8qYx6TQfDtdOcFlN23Y8lZUXuK04/8OJhpnUnjnKEmzrUBklCsAt8il0f3jhHii9lcpUUvhmL2Bj+COmHHN/9x0j/Zfa6Tzj2TUNH7zjlIfrRHaB/k/BdDmFfLJLRtUAf4p06RAn0vglVp1aB7V51T674xKFeGrWp7H1QKy8sBXDHO7fNDrKjIRmR2wXXOYAUFgfiaiuBQirQcefrg7uvNAvIMY9OCWB5qXgyOhMqoQxKfyz6cpGGIxw3TQuvbgsvC0faraV80XcnS/SRooFOTiiua97TX4TQVqZZ/8JUUfRJVNjy2meueI8T7hLTIn1zXClXW+rBqn92jCQz/TBH1FbWpVjGpfhPfn08JbnQrzUw18/fJIC+ncNBfT1p6/DrcPE/t2Wv8TSkf6eH/XmqXk+TsqCyycgpTe4Dko1MOCCdSiiyKifvKvJVmRZSIZ+d6B4PxyKBNeZdRiNaUxBC75i0FmhuESSP+q2gq/JqbdQN/yigQj9yuJflVDjSzSHPCTt7HFAwbATqkaNEp0MghGHW7VjwL7cVwYVq7r4WRKI+xAW36vrqarnWNDtapi466Vyps7c8L9obRIyVDw1/ZyAbwQGOREg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(39860400002)(451199021)(40470700004)(46966006)(36840700001)(86362001)(54906003)(8936002)(8676002)(5660300002)(82310400005)(110136005)(7416002)(26005)(1076003)(44832011)(7696005)(478600001)(4326008)(70206006)(70586007)(41300700001)(316002)(6666004)(16526019)(186003)(2616005)(2906002)(47076005)(40460700003)(83380400001)(336012)(426003)(36860700001)(40480700001)(36756003)(82740400003)(921005)(356005)(81166007)(83996005)(2101003)(36900700001);DIR:OUT;SFP:1101; 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Signed-off-by: Evan Quan Reviewed-by: Mario Limonciello --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 30 +++++++++++++++---- drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 7 +++++ 2 files changed, 32 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 83d428e890df..a4cfaf8a6f59 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -1278,7 +1278,8 @@ static int smu_wbrf_event_handler(struct notifier_block *nb, switch (action) { case WBRF_CHANGED: - smu_wbrf_handle_exclusion_ranges(smu); + schedule_delayed_work(&smu->wbrf_delayed_work, + msecs_to_jiffies(SMU_WBRF_EVENT_HANDLING_PACE)); break; default: return NOTIFY_DONE; @@ -1287,6 +1288,21 @@ static int smu_wbrf_event_handler(struct notifier_block *nb, return NOTIFY_OK; } +/** + * smu_wbrf_delayed_work_handler - callback on delayed work timer expired + * + * @work: struct work_struct pointer + * + * Flood is over and driver will consume the latest exclusion ranges. + */ +static void smu_wbrf_delayed_work_handler(struct work_struct *work) +{ + struct smu_context *smu = + container_of(work, struct smu_context, wbrf_delayed_work.work); + + smu_wbrf_handle_exclusion_ranges(smu); +} + /** * smu_wbrf_support_check - check wbrf support * @@ -1323,6 +1339,9 @@ static int smu_wbrf_init(struct smu_context *smu) if (!smu->wbrf_supported) return 0; + INIT_DELAYED_WORK(&smu->wbrf_delayed_work, + smu_wbrf_delayed_work_handler); + smu->wbrf_notifier.notifier_call = smu_wbrf_event_handler; ret = wbrf_register_notifier(&smu->wbrf_notifier); if (ret) @@ -1333,11 +1352,10 @@ static int smu_wbrf_init(struct smu_context *smu) * before our driver loaded. To make sure our driver * is awared of those exclusion ranges. */ - ret = smu_wbrf_handle_exclusion_ranges(smu); - if (ret) - dev_err(adev->dev, "Failed to handle wbrf exclusion ranges\n"); + schedule_delayed_work(&smu->wbrf_delayed_work, + msecs_to_jiffies(SMU_WBRF_EVENT_HANDLING_PACE)); - return ret; + return 0; } /** @@ -1353,6 +1371,8 @@ static void smu_wbrf_fini(struct smu_context *smu) return; wbrf_unregister_notifier(&smu->wbrf_notifier); + + cancel_delayed_work_sync(&smu->wbrf_delayed_work); } static int smu_smc_hw_setup(struct smu_context *smu) diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h index 5b2343cfc69b..5df28d4a8c30 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h @@ -480,6 +480,12 @@ struct stb_context { #define WORKLOAD_POLICY_MAX 7 +/* + * Configure wbrf event handling pace as there can be only one + * event processed every SMU_WBRF_EVENT_HANDLING_PACE ms. + */ +#define SMU_WBRF_EVENT_HANDLING_PACE 10 + struct smu_context { struct amdgpu_device *adev; @@ -579,6 +585,7 @@ struct smu_context /* data structures for wbrf feature support */ bool wbrf_supported; struct notifier_block wbrf_notifier; + struct delayed_work wbrf_delayed_work; }; struct i2c_adapter;