From patchwork Thu Jun 29 08:28:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 114253 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp9501982vqr; Thu, 29 Jun 2023 02:17:55 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7Yf3K+OFxw1acBDmG0IFhW+UK5kB8xZpOyvgFn5AXUwerE2j8B2V1yFxd+Vc5jwN2g839R X-Received: by 2002:a05:6a00:1c8e:b0:679:a1f1:a5f8 with SMTP id y14-20020a056a001c8e00b00679a1f1a5f8mr2645397pfw.3.1688030275134; Thu, 29 Jun 2023 02:17:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1688030275; cv=none; d=google.com; s=arc-20160816; b=Wn3LBrxx0J+cZW2Ap7NuHjSCt2ZeCr40OtEbbz/tVkqiWpA8D+QpiBfkt3wf8rM+Q8 GpDId9+i7rtk75rJzbr5s10+1TkgAgNHqDSCwCijI1bHzz2E1BJI14/wnaRhiFLuuLmR L5YClqIVMYaWcZdnB5PTw6qF+azvah/Gir164KNBIhWqal0oy5KzktbKg3TpbuEKdffW OOPhBrbx4lLI2xOL9z0nkFvXOIPGUHCoTPaznLYmF3oRXhltA6XG574uSyQHesji21Aq T97Y6nQm8CrWlcf7tCzuUIZ+NKJb2zwlag46fv5+CL5vmyceJzR5ktZJOFOoXbV1q0mJ XWJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=s1LLoazO9l3tQJmKXAR8AmVPrFZOVFTxGQDs0YlXq8I=; fh=id5NoWTfrmVnmm2w/Ed5X4erHGUuViLdGWw+WL1NNbc=; b=QrR2EmMnkLVjZZ4AhfDFq198eXD2njKxbiXSp3GTbOmuP0Qkonrg5uyCsHT7Z/xpoB OvJJvMlKvYp6KQaf36DHmw6axuN1k0BsAtWEKmd7Cc2UmOsPUqYzw9ziqHl4j1FI+ulN GxK2oLu71+FbbyN+1F6B3SXLo+foZbKpUUEO1meWbmHYlgY+yTs5/T5og4Qwc9eg1QMG opJnZAToXJcseXV+ry0ejo8gj3ET/tB8pqvK1NCcDAs3OPP2radSVDAV/6aZlgRN1fWL C/1knU76hg+iVIpZw5ZG+UUzvMiZwVNWz4jsFEzF+w5XBe8EBf8dDt4zpblocfYxxXbY QsdQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=BG0tf0G+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l5-20020a056a0016c500b006536902d31fsi10846027pfc.185.2023.06.29.02.17.42; Thu, 29 Jun 2023 02:17:55 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=BG0tf0G+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232598AbjF2IbW (ORCPT + 99 others); Thu, 29 Jun 2023 04:31:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48656 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232645AbjF2IaW (ORCPT ); Thu, 29 Jun 2023 04:30:22 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 88169131; Thu, 29 Jun 2023 01:30:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1688027410; x=1719563410; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bIs6kqMED+8WeRtoxXsVzTKb8hUL0V34cciMGbaTy6Y=; b=BG0tf0G+aFVFpt0jAusByz4CPoEmvRuBHnycalTGo6+mDEjd4elNtLEp XtI30XWaFQiqxjF+4CK1ipLtImr9J1z/ctQTGZH4w2Dldqf0K/2YSk3JT KAW1LlOw1TsWaxFd30hycojN8L6hOBbn2UuDk4EU0ofgegLj7Ovg1ehWd ykPoEkPqiJ1mFtKdCf2eSmMirVJpq0GlzSE1cpH/lzKQkyi+PEz6180iv lQASahrXbstbTE6k9LPaY3PcdbRHd5W/oV04pjnv+Y3Ozp6QpIS8rl3jH myhLrRAQeoRsWd90cGxneTS7UnxF2OAcgQ/Nz2UwuNeAvkmijM79eBfqX A==; X-IronPort-AV: E=Sophos;i="6.01,168,1684825200"; d="scan'208";a="159104686" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 29 Jun 2023 01:30:09 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 29 Jun 2023 01:29:58 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 29 Jun 2023 01:29:56 -0700 From: Conor Dooley To: CC: , , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Albert Ou , Andrew Jones , Heiko Stuebner , "Evan Green" , Sunil V L , , , Subject: [PATCH v2 04/10] RISC-V: repurpose riscv_isa_ext array in riscv_fill_hwcap() Date: Thu, 29 Jun 2023 09:28:50 +0100 Message-ID: <20230629-lair-thinner-349e8d9f0e89@wendy> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230629-rebuttal-vagueness-a699deb7c7b3@wendy> References: <20230629-rebuttal-vagueness-a699deb7c7b3@wendy> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3700; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=bIs6kqMED+8WeRtoxXsVzTKb8hUL0V34cciMGbaTy6Y=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDClzHQ7V1O9/urQ6ewEnQ+vNl5feWW7avabv1Zbm7nUrz4fd jeBd0VHKwiDGwSArpsiSeLuvRWr9H5cdzj1vYeawMoEMYeDiFICJ3A9kZJhS9dCBN0zb5VdwyCfH77 O+7X3afe3gqqe7P9/f8aPHw3wOwz+r3WknI/w4BRTTYuWu+DIdN97y1mrG3wR2xolaN424M3kA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770028033858086192?= X-GMAIL-MSGID: =?utf-8?q?1770028033858086192?= In riscv_fill_hwcap() riscv_isa_ext array can be looped over, rather than duplicating the list of extensions with individual SET_ISA_EXT_MAP() usage. While at it, drop the statement-of-the-obvious comments from the struct, rename uprop to something more suitable for its new use & constify the members. Reviewed-by: Andrew Jones Signed-off-by: Conor Dooley --- Changes in v2: - Delete the now unused definition --- arch/riscv/include/asm/hwcap.h | 7 ++----- arch/riscv/kernel/cpu.c | 5 +++-- arch/riscv/kernel/cpufeature.c | 26 +++++++------------------- 3 files changed, 12 insertions(+), 26 deletions(-) diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 7a57e6109aef..2460ac2fc7ed 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -55,7 +55,6 @@ #define RISCV_ISA_EXT_ZIHPM 42 #define RISCV_ISA_EXT_MAX 64 -#define RISCV_ISA_EXT_NAME_LEN_MAX 32 #ifdef CONFIG_RISCV_M_MODE #define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SMAIA @@ -70,10 +69,8 @@ unsigned long riscv_get_elf_hwcap(void); struct riscv_isa_ext_data { - /* Name of the extension displayed to userspace via /proc/cpuinfo */ - char uprop[RISCV_ISA_EXT_NAME_LEN_MAX]; - /* The logical ISA extension ID */ - unsigned int isa_ext_id; + const unsigned int id; + const char *name; }; extern const struct riscv_isa_ext_data riscv_isa_ext[]; diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 269a32ceb595..c89abf8ef6de 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -164,9 +164,10 @@ static void print_isa_ext(struct seq_file *f) { for (int i = 0; i < riscv_isa_ext_count; i++) { const struct riscv_isa_ext_data *edata = &riscv_isa_ext[i]; - if (!__riscv_isa_extension_available(NULL, edata->isa_ext_id)) + if (!__riscv_isa_extension_available(NULL, edata->id)) continue; - seq_printf(f, "_%s", edata->uprop); + + seq_printf(f, "_%s", edata->name); } } diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index fb476153fffc..6d8cd45af723 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -99,11 +99,10 @@ static bool riscv_isa_extension_check(int id) return true; } -#define __RISCV_ISA_EXT_DATA(UPROP, EXTID) \ - { \ - .uprop = #UPROP, \ - .isa_ext_id = EXTID, \ - } +#define __RISCV_ISA_EXT_DATA(_name, _id) { \ + .name = #_name, \ + .id = _id, \ +} /* * The canonical order of ISA extension names in the ISA string is defined in @@ -366,20 +365,9 @@ void __init riscv_fill_hwcap(void) set_bit(nr, isainfo->isa); } } else { - /* sorted alphabetically */ - SET_ISA_EXT_MAP("smaia", RISCV_ISA_EXT_SMAIA); - SET_ISA_EXT_MAP("ssaia", RISCV_ISA_EXT_SSAIA); - SET_ISA_EXT_MAP("sscofpmf", RISCV_ISA_EXT_SSCOFPMF); - SET_ISA_EXT_MAP("sstc", RISCV_ISA_EXT_SSTC); - SET_ISA_EXT_MAP("svinval", RISCV_ISA_EXT_SVINVAL); - SET_ISA_EXT_MAP("svnapot", RISCV_ISA_EXT_SVNAPOT); - SET_ISA_EXT_MAP("svpbmt", RISCV_ISA_EXT_SVPBMT); - SET_ISA_EXT_MAP("zba", RISCV_ISA_EXT_ZBA); - SET_ISA_EXT_MAP("zbb", RISCV_ISA_EXT_ZBB); - SET_ISA_EXT_MAP("zbs", RISCV_ISA_EXT_ZBS); - SET_ISA_EXT_MAP("zicbom", RISCV_ISA_EXT_ZICBOM); - SET_ISA_EXT_MAP("zicboz", RISCV_ISA_EXT_ZICBOZ); - SET_ISA_EXT_MAP("zihintpause", RISCV_ISA_EXT_ZIHINTPAUSE); + for (int i = 0; i < riscv_isa_ext_count; i++) + SET_ISA_EXT_MAP(riscv_isa_ext[i].name, + riscv_isa_ext[i].id); } #undef SET_ISA_EXT_MAP }