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arm64: dts: imx8ulp: add more nodes
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Commit Message
Peng Fan (OSS)
June 25, 2023, 12:42 p.m. UTC
From: Haibo Chen <haibo.chen@nxp.com> Add flexspi node, flexspi has a special memory region mapped to 0x60000000~0x6fffffff. This region is for AHB usage. So add this region to SoC ranges. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index 16906c20bce9..4d317029490c 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -194,7 +194,8 @@ soc: soc@0 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x0 0x0 0x40000000>; + ranges = <0x0 0x0 0x0 0x40000000>, + <0x60000000 0x0 0x60000000 0x1000000>; s4muap: mailbox@27020000 { compatible = "fsl,imx8ulp-mu-s4"; @@ -349,6 +350,21 @@ pcc4: clock-controller@29800000 { #reset-cells = <1>; }; + flexspi2: spi@29810000 { + compatible = "nxp,imx8mm-fspi"; + reg = <0x29810000 0x10000>, <0x60000000 0x10000000>; + reg-names = "fspi_base", "fspi_mmap"; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pcc4 IMX8ULP_CLK_FLEXSPI2>, + <&pcc4 IMX8ULP_CLK_FLEXSPI2>; + clock-names = "fspi", "fspi_en"; + assigned-clocks = <&pcc4 IMX8ULP_CLK_FLEXSPI2>; + assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SPLL3_PFD3_DIV2>; + status = "disabled"; + }; + lpi2c6: i2c@29840000 { compatible = "fsl,imx8ulp-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x29840000 0x10000>;