Message ID | 20230624112958.27727-1-jonas.gorski@gmail.com |
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State | New |
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[94.220.187.252]) by smtp.gmail.com with ESMTPSA id l25-20020a1c7919000000b003f9b29ba838sm1925790wme.35.2023.06.24.04.30.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Jun 2023 04:30:44 -0700 (PDT) From: Jonas Gorski <jonas.gorski@gmail.com> To: Linus Walleij <linus.walleij@linaro.org>, Imre Kaloz <kaloz@dune.hu>, Krzysztof Halasa <khalasa@piap.pl> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] bus: ixp4xx: fix IXP4XX_EXP_T1_MASK Date: Sat, 24 Jun 2023 13:29:58 +0200 Message-Id: <20230624112958.27727-1-jonas.gorski@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769583461900496680?= X-GMAIL-MSGID: =?utf-8?q?1769583461900496680?= |
Series |
bus: ixp4xx: fix IXP4XX_EXP_T1_MASK
|
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Commit Message
Jonas Gorski
June 24, 2023, 11:29 a.m. UTC
The IXP4XX_EXP_T1_MASK was shifted one bit to the right, overlapping
IXP4XX_EXP_T2_MASK and leaving bit 29 unused. The offset being wrong is
also confirmed at least by the datasheet of IXP45X/46X [1].
Fix this by aligning it to IXP4XX_EXP_T1_SHIFT.
[1] https://www.intel.com/content/dam/www/public/us/en/documents/manuals/ixp45x-ixp46x-developers-manual.pdf
Fixes: 1c953bda90ca ("bus: ixp4xx: Add a driver for IXP4xx expansion bus")
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
Based on 4.6-rc7-ish, since I didn't know which tree I should use,
though for this driver it probably doesn't matter anyway.
Build tested, but not run tested.
@Linus
I found this purely by accident when I was looking for examples of
GENMASK(). Your recent push to resurrect ixp4xx in OpenWrt convinced me
to submit it in a timely manner ;D
Also the "ARM/INTEL IXP4XX ARM ARCHITECTURE" entry in MAINTAINERS still
lists your kernel.org email address, you might want to update that.
@Imre
Likewise, it still has your openwrt.org address.
drivers/bus/intel-ixp4xx-eb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
On Sat, Jun 24, 2023 at 1:30 PM Jonas Gorski <jonas.gorski@gmail.com> wrote: > The IXP4XX_EXP_T1_MASK was shifted one bit to the right, overlapping > IXP4XX_EXP_T2_MASK and leaving bit 29 unused. The offset being wrong is > also confirmed at least by the datasheet of IXP45X/46X [1]. > > Fix this by aligning it to IXP4XX_EXP_T1_SHIFT. > > [1] https://www.intel.com/content/dam/www/public/us/en/documents/manuals/ixp45x-ixp46x-developers-manual.pdf > > Fixes: 1c953bda90ca ("bus: ixp4xx: Add a driver for IXP4xx expansion bus") > Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Yups that's a bug! (My typo...) I'll funnel it upstream through the SoC tree. Yours, Linus Walleij
diff --git a/drivers/bus/intel-ixp4xx-eb.c b/drivers/bus/intel-ixp4xx-eb.c index f5ba6bee6fd8..320cf307db05 100644 --- a/drivers/bus/intel-ixp4xx-eb.c +++ b/drivers/bus/intel-ixp4xx-eb.c @@ -33,7 +33,7 @@ #define IXP4XX_EXP_TIMING_STRIDE 0x04 #define IXP4XX_EXP_CS_EN BIT(31) #define IXP456_EXP_PAR_EN BIT(30) /* Only on IXP45x and IXP46x */ -#define IXP4XX_EXP_T1_MASK GENMASK(28, 27) +#define IXP4XX_EXP_T1_MASK GENMASK(29, 28) #define IXP4XX_EXP_T1_SHIFT 28 #define IXP4XX_EXP_T2_MASK GENMASK(27, 26) #define IXP4XX_EXP_T2_SHIFT 26