From patchwork Thu Jun 22 18:36:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 111791 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp5301533vqr; Thu, 22 Jun 2023 12:42:38 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ73GvEIIDbwgs6sidu73dGiPGbAyumyb425DJ34EJ2Ay2O3w/jQiT4RJerytUIpc8Qb+tgx X-Received: by 2002:a05:6a00:998:b0:668:7b20:91e1 with SMTP id u24-20020a056a00099800b006687b2091e1mr17146150pfg.20.1687462957845; Thu, 22 Jun 2023 12:42:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687462957; cv=none; d=google.com; s=arc-20160816; b=WBhvqTJf+rrnhS443BoqNtUS7tlb2jxay10QHAmNivq2UVNih/0K8z+NzEIAR/A8ob kp2yWcASkcftAUkgLayH2IeHEFjnA5thgh+o1KNM9L6RES+fjETrh7FA2OCDiSHSSUSf 7ArM40KkVt3MHTFKcVi+PEMYnmnTZEZUr4P4K6MWsoTd329aUv+Y2nUUMVs/FmT9XW9/ 4OePP26CFF9sSEkoYutNnMWYHh3WhrQsubtg10aEuSJOTo04+obQrIpZ+5HrPj5B04Kk RJl0AOh8OILCNs4Bro1sZzBhugK3aruAPz5K5tM/8apUwJDBm5AfdUNjQPr5YVzISvF8 ZGjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=m249YKHqcE5UNgb/dZZjaoGGIYwacCjAoLT4Sc03ROo=; b=w864rktjylSantUKYRXKMxXugc2CX0wO3Gn0bt/gxtkgNeVIV2r4uKb0ytXcw5bPjd HCh9JnDREi3kZZ80FnChH+od5RUqydBVgnyjPH3fpfqH7mgPXUqFjiwL0lwCmUzrIVYw Ztt8ZA57oXe5cVhMnULbtc2SLGya1d5TXYY5tZE9mLVQ9/T1LB6jtVrTnzRlBWVE3jPZ 8mpdVdQBxkYXKogQKSxrLlFt/giGtVud/9V6qxlTSzp48CKbOv9LpRMC2IBbNix3OiUr QTIXHeMp3iPf5EECzJtm4I0N/881ZrLbiLIIrMWIOnq5odVff7UT+3Cz4LIUXM/2yDGe Of2Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=dTvHcpap; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ct24-20020a056a000f9800b00665dfbf3b1esi3890703pfb.270.2023.06.22.12.42.25; Thu, 22 Jun 2023 12:42:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=dTvHcpap; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230314AbjFVSgQ (ORCPT + 99 others); Thu, 22 Jun 2023 14:36:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229522AbjFVSgN (ORCPT ); Thu, 22 Jun 2023 14:36:13 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D0BF19AD for ; Thu, 22 Jun 2023 11:36:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1687458971; x=1718994971; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VhBOr6U2D5NWmxrtLbRpTCwCo1J6kdCAEbXfowzEbFg=; b=dTvHcpapVde8XGR4tFu03bISH+oW1c9RncKLHrd0qVkDZf2196M06OTA TRGCTXngbfaFzYQnZwfXNdhTRxx5n/YZSjbKMr2ni9QAvNrNpWoHL9Q+9 zHF73rsXjnDwLRPBVpwsH5/ODjpc3YSrxpvrqOyHr00Sh5HI91ARJBA07 Wa1FW3gs2P0V/7m6hfz8poDVxKg43aOtfyz9EtKso8wDbfYQxCsArYgIm GyBC2BDFrcmMr7tumIkifWV/lDkj+oGeyc22317p6s/+pXuWtCzlwbyBn T40x+B5Q5DWpSDEc5zgzEJw/slDSh6o02KqvtQf8AuHIHkA9I9bYCR7B7 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10749"; a="350336481" X-IronPort-AV: E=Sophos;i="6.01,149,1684825200"; d="scan'208";a="350336481" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2023 11:36:10 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10749"; a="749444243" X-IronPort-AV: E=Sophos;i="6.01,149,1684825200"; d="scan'208";a="749444243" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga001.jf.intel.com with ESMTP; 22 Jun 2023 11:36:08 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 63136256; Thu, 22 Jun 2023 21:36:19 +0300 (EEST) From: Andy Shevchenko To: Mark Brown , Andy Shevchenko , linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , "Rafael J. Wysocki" , Linus Walleij Subject: [PATCH v1 2/3] regmap: cache: Revert "Add 64-bit mode support" Date: Thu, 22 Jun 2023 21:36:12 +0300 Message-Id: <20230622183613.58762-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.40.0.1.gaa8946217a0b In-Reply-To: <20230622183613.58762-1-andriy.shevchenko@linux.intel.com> References: <20230622183613.58762-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769433158653946049?= X-GMAIL-MSGID: =?utf-8?q?1769433158653946049?= There is no support for 64-bit data size in regmap, so there is no point to have it in regmap cache. This reverts commit 8b7663de6e2bfe3c40e1846e1c4625f33d138757. Signed-off-by: Andy Shevchenko --- drivers/base/regmap/regcache.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c index 28bc3ae9458a..156490ab7f34 100644 --- a/drivers/base/regmap/regcache.c +++ b/drivers/base/regmap/regcache.c @@ -590,14 +590,6 @@ void regcache_set_val(struct regmap *map, void *base, unsigned int idx, cache[idx] = val; break; } -#ifdef CONFIG_64BIT - case 8: { - u64 *cache = base; - - cache[idx] = val; - break; - } -#endif default: BUG(); } @@ -630,13 +622,6 @@ unsigned int regcache_get_val(struct regmap *map, const void *base, return cache[idx]; } -#ifdef CONFIG_64BIT - case 8: { - const u64 *cache = base; - - return cache[idx]; - } -#endif default: BUG(); }