From patchwork Thu Jun 22 14:57:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hugo Villeneuve X-Patchwork-Id: 111724 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp5141845vqr; Thu, 22 Jun 2023 08:12:43 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5B2JT/R2Gu61UOIrJ2y2Xi2FfYStf/Hw+0VcwNFaS8aBkdS5oGzDRRHUsnGfApgnYgrj9j X-Received: by 2002:a05:6a00:2e1f:b0:647:7ee8:6251 with SMTP id fc31-20020a056a002e1f00b006477ee86251mr24935240pfb.21.1687446763150; Thu, 22 Jun 2023 08:12:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687446763; cv=none; d=google.com; s=arc-20160816; b=Bvuz3sOKl+HfDy7PTXj1Bnppn6GyI+3+Ony/MvQql6l5W7yYHvzrY12HgEcluJsmcB uZIV6L0nr7EtH/lxAIA8H8HkdHu/nGOFlw8cWgXwv/Pqc7aTGksSXIV8pZ+dUSpoW5+x VecYpFXU6TWB+TZ2B6+MC54aDD7iMnkFspA5SIzz4rL1VLimJ2/1he+ZLVh/9dGts26W lVrm+WqFyMKarA7BysGM/ikGUHaeBtC73/15PkbGDFyKGO1ose3LkfuTy1qSEKUM6hk/ c7fKM3jKKrOQf0hXqDl4g0VXgaGJj+ZQoFAv1JgPavsg7vA8Zqbh/WiQgVcRtgmoUjGp jjzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:subject:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:cc:to:from:dkim-signature; bh=BGhVxQ4kyRqNucBoiEMvM4/s26xgGee59+8lJt1ayqM=; b=QK4Pbc4p/qzvDauRurxWzqdKdTBd88fdfZEAmAc2caGn6DIQe0akOQmu3BDkuWEy+e yngLKEAsFRWzr1EoWN4WDSOh9+I0OhGQBZNzzynu3EyOSR/ibbXFCN43R06RgRhqLAwK RsDKaJGb4hhNOpbZrvx/Yvx331u3ZlD1mm+zTmaT6MDvpgcBQl0TujLxRwOLvvgSuQKR L3SOr0uBjMigHQw3DscPxeC6uiCvX+6GN3CSBsXbzE9c19rEdsumFuxP7N7zo5EyG6Q4 7Z/kU7KC1konxmO9T8cDoIXRQdWzIEG0kBNmL82FjgPBUUvP/UC21j5pJE0oi08FE/e7 scjg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@hugovil.com header.s=x header.b=opFXvbw4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i66-20020a625445000000b00643af2c3432si6231973pfb.222.2023.06.22.08.12.29; Thu, 22 Jun 2023 08:12:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@hugovil.com header.s=x header.b=opFXvbw4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232262AbjFVO7E (ORCPT + 99 others); Thu, 22 Jun 2023 10:59:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232128AbjFVO63 (ORCPT ); Thu, 22 Jun 2023 10:58:29 -0400 Received: from mail.hugovil.com (mail.hugovil.com [162.243.120.170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A401B1FE0; Thu, 22 Jun 2023 07:58:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=hugovil.com ; s=x; h=Subject:Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=BGhVxQ4kyRqNucBoiEMvM4/s26xgGee59+8lJt1ayqM=; b=opFXvbw49LihcHZNn9+2NElnTX Hn98lQqhfiSuCXGKxXcVxBl2wJavGpPWWehuhryewtEBceCvsASa3XeJi7mj0uBxgq+mLwdzsXJ4f GgbuCkz8bbzQAsr43a/Dgdv0UrN6xTJ2nAggc/nIP3XxV/50iK8lrQMOIh/D7gHEJqS4=; Received: from modemcable061.19-161-184.mc.videotron.ca ([184.161.19.61]:55382 helo=localhost.localdomain) by mail.hugovil.com with esmtpa (Exim 4.92) (envelope-from ) id 1qCLlL-0002fr-Fv; Thu, 22 Jun 2023 10:58:20 -0400 From: Hugo Villeneuve To: a.zummo@towertech.it, alexandre.belloni@bootlin.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, hugo@hugovil.com, Hugo Villeneuve , Bruno Thomsen Date: Thu, 22 Jun 2023 10:57:55 -0400 Message-Id: <20230622145800.2442116-13-hugo@hugovil.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230622145800.2442116-1-hugo@hugovil.com> References: <20230622145800.2442116-1-hugo@hugovil.com> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 184.161.19.61 X-SA-Exim-Mail-From: hugo@hugovil.com X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 Subject: [PATCH v4 12/17] rtc: pcf2127: add support for PCF2131 interrupts on output INT_A X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.hugovil.com) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769416177406974155?= X-GMAIL-MSGID: =?utf-8?q?1769416177406974155?= From: Hugo Villeneuve The PCF2127 and PCF2129 have one output interrupt pin. The PCF2131 has two, named INT_A and INT_B. The hardware support that any interrupt source can be routed to either one or both of them. Force all interrupt sources to go to the INT A pin. Support to route any interrupt source to INT A/B pins is not supported by this driver at the moment. Signed-off-by: Hugo Villeneuve Reviewed-by: Bruno Thomsen --- drivers/rtc/rtc-pcf2127.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c index 09607b67c282..2eef65232417 100644 --- a/drivers/rtc/rtc-pcf2127.c +++ b/drivers/rtc/rtc-pcf2127.c @@ -179,6 +179,7 @@ struct pcf21xx_config { int max_register; unsigned int has_nvmem:1; unsigned int has_bit_wd_ctl_cd0:1; + unsigned int has_int_a_b:1; /* PCF2131 supports two interrupt outputs. */ u8 reg_time_base; /* Time/date base register. */ u8 regs_alarm_base; /* Alarm function base registers. */ u8 reg_wd_ctl; /* Watchdog control register. */ @@ -845,6 +846,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = { .max_register = 0x1d, .has_nvmem = 1, .has_bit_wd_ctl_cd0 = 1, + .has_int_a_b = 0, .reg_time_base = PCF2127_REG_TIME_BASE, .regs_alarm_base = PCF2127_REG_ALARM_BASE, .reg_wd_ctl = PCF2127_REG_WD_CTL, @@ -869,6 +871,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = { .max_register = 0x19, .has_nvmem = 0, .has_bit_wd_ctl_cd0 = 0, + .has_int_a_b = 0, .reg_time_base = PCF2127_REG_TIME_BASE, .regs_alarm_base = PCF2127_REG_ALARM_BASE, .reg_wd_ctl = PCF2127_REG_WD_CTL, @@ -893,6 +896,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = { .max_register = 0x36, .has_nvmem = 0, .has_bit_wd_ctl_cd0 = 0, + .has_int_a_b = 1, .reg_time_base = PCF2131_REG_TIME_BASE, .regs_alarm_base = PCF2131_REG_ALARM_BASE, .reg_wd_ctl = PCF2131_REG_WD_CTL, @@ -989,6 +993,28 @@ static int pcf2127_enable_ts(struct device *dev, int ts_id) return ret; } +/* Route all interrupt sources to INT A pin. */ +static int pcf2127_configure_interrupt_pins(struct device *dev) +{ + struct pcf2127 *pcf2127 = dev_get_drvdata(dev); + int ret; + + /* Mask bits need to be cleared to enable corresponding + * interrupt source. + */ + ret = regmap_write(pcf2127->regmap, + PCF2131_REG_INT_A_MASK1, 0); + if (ret) + return ret; + + ret = regmap_write(pcf2127->regmap, + PCF2131_REG_INT_A_MASK2, 0); + if (ret) + return ret; + + return ret; +} + static int pcf2127_probe(struct device *dev, struct regmap *regmap, int alarm_irq, const char *name, const struct pcf21xx_config *config) { @@ -1047,6 +1073,15 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap, set_bit(RTC_FEATURE_ALARM, pcf2127->rtc->features); } + if (pcf2127->cfg->has_int_a_b) { + /* Configure int A/B pins, independently of alarm_irq. */ + ret = pcf2127_configure_interrupt_pins(dev); + if (ret) { + dev_err(dev, "failed to configure interrupt pins\n"); + return ret; + } + } + if (pcf2127->cfg->has_nvmem) { struct nvmem_config nvmem_cfg = { .priv = pcf2127,