Message ID | 20230622-topic-8998clk-v1-6-5b7a0d6e98b1@linaro.org |
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State | New |
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[83.9.31.165]) by smtp.gmail.com with ESMTPSA id eq21-20020a056512489500b004f4c3feb9fbsm1099235lfb.61.2023.06.22.04.57.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Jun 2023 04:57:56 -0700 (PDT) From: Konrad Dybcio <konrad.dybcio@linaro.org> Date: Thu, 22 Jun 2023 13:57:46 +0200 Subject: [PATCH 6/9] clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230622-topic-8998clk-v1-6-5b7a0d6e98b1@linaro.org> References: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> In-Reply-To: <20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Jeffrey Hugo <quic_jhugo@quicinc.com>, Taniya Das <tdas@codeaurora.org> Cc: Marijn Suijten <marijn.suijten@somainline.org>, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio <konrad.dybcio@linaro.org> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687435067; l=1420; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=RMdpPTx0djdmSD0IRCOXo7v4qwhogMdk+CvkRbKSXoY=; b=nXGgMQ70zoaumt/TBlld6IqSQFvVaxn2XlqCKqTL97RyXLaeCUKWnUU136fMxxQeDB49j6YkX Nay9tUVEsgPCUFc3D8OUJSnju0/0HSp8deMuJoJKr+0Sy8N7N7hXXor X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769404096611613181?= X-GMAIL-MSGID: =?utf-8?q?1769404096611613181?= |
Series |
MSM8998 clk cleanups and fixups
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Commit Message
Konrad Dybcio
June 22, 2023, 11:57 a.m. UTC
Some branch clocks are governed externally and we're only supposed to
send a request concerning their shutdown, not actually ensure it happens.
Use the BRANCH_HALT_SKIP define to skip checking the halt bit.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
drivers/clk/qcom/gcc-msm8998.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Comments
On 22.06.2023 13:57, Konrad Dybcio wrote: > Some branch clocks are governed externally and we're only supposed to > send a request concerning their shutdown, not actually ensure it happens. > > Use the BRANCH_HALT_SKIP define to skip checking the halt bit. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- Whoops. Again, right after hitting send, I noticed this one was already sent with https://lore.kernel.org/linux-arm-msm/20230531-topic-8998_mmssclk-v1-0-2b5a8fc90991@linaro.org/ > drivers/clk/qcom/gcc-msm8998.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c > index cccb19cae481..ef410f52f09f 100644 > --- a/drivers/clk/qcom/gcc-msm8998.c > +++ b/drivers/clk/qcom/gcc-msm8998.c > @@ -2112,7 +2112,7 @@ static struct clk_branch gcc_gp3_clk = { > > static struct clk_branch gcc_bimc_gfx_clk = { > .halt_reg = 0x46040, > - .halt_check = BRANCH_HALT, > + .halt_check = BRANCH_HALT_SKIP, > .clkr = { > .enable_reg = 0x46040, > .enable_mask = BIT(0), > @@ -2125,7 +2125,7 @@ static struct clk_branch gcc_bimc_gfx_clk = { > > static struct clk_branch gcc_gpu_bimc_gfx_clk = { > .halt_reg = 0x71010, > - .halt_check = BRANCH_HALT, > + .halt_check = BRANCH_HALT_SKIP, > .clkr = { > .enable_reg = 0x71010, > .enable_mask = BIT(0), > @@ -2151,7 +2151,7 @@ static struct clk_branch gcc_gpu_bimc_gfx_src_clk = { > > static struct clk_branch gcc_gpu_cfg_ahb_clk = { > .halt_reg = 0x71004, > - .halt_check = BRANCH_HALT, > + .halt_check = BRANCH_HALT_SKIP, > .clkr = { > .enable_reg = 0x71004, > .enable_mask = BIT(0), >
On 6/22/2023 5:57 AM, Konrad Dybcio wrote: > Some branch clocks are governed externally and we're only supposed to > send a request concerning their shutdown, not actually ensure it happens. > > Use the BRANCH_HALT_SKIP define to skip checking the halt bit. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index cccb19cae481..ef410f52f09f 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -2112,7 +2112,7 @@ static struct clk_branch gcc_gp3_clk = { static struct clk_branch gcc_bimc_gfx_clk = { .halt_reg = 0x46040, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x46040, .enable_mask = BIT(0), @@ -2125,7 +2125,7 @@ static struct clk_branch gcc_bimc_gfx_clk = { static struct clk_branch gcc_gpu_bimc_gfx_clk = { .halt_reg = 0x71010, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x71010, .enable_mask = BIT(0), @@ -2151,7 +2151,7 @@ static struct clk_branch gcc_gpu_bimc_gfx_src_clk = { static struct clk_branch gcc_gpu_cfg_ahb_clk = { .halt_reg = 0x71004, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x71004, .enable_mask = BIT(0),