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Wed, 21 Jun 2023 18:55:58 -0500 From: Suravee Suthikulpanit To: , , CC: , , , , , , , , , , , , , , , "Suravee Suthikulpanit" Subject: [RFC PATCH 17/21] iommu/amd: Introduce vIOMMU ioctl for updating domain mapping Date: Wed, 21 Jun 2023 18:55:04 -0500 Message-ID: <20230621235508.113949-18-suravee.suthikulpanit@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230621235508.113949-1-suravee.suthikulpanit@amd.com> References: <20230621235508.113949-1-suravee.suthikulpanit@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9CD:EE_|SJ2PR12MB7920:EE_ X-MS-Office365-Filtering-Correlation-Id: 587bf228-48bd-4c05-18f3-08db72b311f6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: QISvJwkL6Vsyd6Ew5uZsOVaBxKih8X/elzhodu/UZqxZyH7uHwy1Jx54v+EPJMNYjvgt6rzBaglYhABNuKhPQNkexJtvEp4b8lYSz0yi6QcrnQbYfJRUrDJXZ+4+Juu0B7XHBczPywHvFz6Ax7hMn6nsUQ7LwBVOSlEEW6UKZ/DQmVKUDIWEh1xLPdkTU4WL98i+qiL8ofCluWT//0AKxNkB+kEcuMQppJO6tEWU4vYE/zWDEjVAaWkaxITyW+7pGsuHy2PHOrZm/4eXgBsvYGoN7OHlOsA1CpheYLOSMYGqunU0UGd5ZZCj3HBjIpQNkZVvALpF9+zXFJS2QneO9gnd42G9FK40cbDqjNJ7ylV7ZepbDIhsIcMNPYu94ZzIy8JWI6B1LJfft2jSkbGW/qMdCtViEuFS/cttpMe73EqG7XS9N21Ed1qcyP5WmOO26ARD8tvz3r7Wv/RXk5+CYKjQ2BSTJ69gC/zBG/UoYhxnkMZzz6b755nNWjhZL0hjhef8TXcLwmeYDYrsMEeZQQ2PsV6HJmiV0c3x+9dM1FxA+1u9blhGEOJDDqrX5Y10nmn1vFrATB6J1wmlj63RjdxU9YDgvV1tiRnd4CXX7ySEcS2rJivX3+A7kIbANLX42CaxaUyO/OA9/5RxkvnRC2uOMdHkgCbDXHPBPVlXXR99APzCFde42Zq6u3UbbXjVOYb1zFd86KBHGOcCEAn+bNxtFiuvAuMz717m2hSz+kR4XVobvR/YG9oviEDfPfC+26umxKEyuuALKZO/Q1fUkQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(376002)(136003)(346002)(396003)(39860400002)(451199021)(40470700004)(36840700001)(46966006)(110136005)(47076005)(44832011)(2906002)(82310400005)(36756003)(36860700001)(70206006)(83380400001)(81166007)(426003)(336012)(7416002)(86362001)(356005)(82740400003)(5660300002)(186003)(41300700001)(16526019)(8936002)(8676002)(26005)(2616005)(316002)(6666004)(7696005)(4326008)(478600001)(40460700003)(70586007)(54906003)(1076003)(40480700001)(36900700001);DIR:OUT;SFP:1101; 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Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/viommu.c | 95 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/drivers/iommu/amd/viommu.c b/drivers/iommu/amd/viommu.c index f6f0056c7fe6..1bcb895cffbf 100644 --- a/drivers/iommu/amd/viommu.c +++ b/drivers/iommu/amd/viommu.c @@ -520,6 +520,101 @@ int amd_viommu_iommu_destroy(struct amd_viommu_iommu_info *data) } EXPORT_SYMBOL(amd_viommu_iommu_destroy); +/* + * Program the DomID via VFCTRL registers + * This function will be called during VM init via VFIO. + */ +static void set_domain_mapping(struct amd_iommu *iommu, u16 guestId, u16 hDomId, u16 gDomId) +{ + u64 val, tmp1, tmp2; + u8 __iomem *vfctrl = VIOMMU_VFCTRL_MMIO_BASE(iommu, guestId); + + pr_debug("%s: iommu_id=%#x, gid=%#x, dom_id=%#x, gdom_id=%#x, val=%#llx\n", + __func__, pci_dev_id(iommu->dev), guestId, hDomId, gDomId, val); + + tmp1 = gDomId; + tmp1 = ((tmp1 & 0xFFFFULL) << 46); + tmp2 = hDomId; + tmp2 = ((tmp2 & 0xFFFFULL) << 14); + val = tmp1 | tmp2 | 0x8000000000000001UL; + writeq(val, vfctrl + VIOMMU_VFCTRL_GUEST_DID_MAP_CONTROL1_OFFSET); + wbinvd_on_all_cpus(); +} + +u64 get_domain_mapping(struct amd_iommu *iommu, u16 gid, u16 gdom_id) +{ + void *addr; + u64 offset, val; + struct amd_iommu_vminfo *vminfo; + + vminfo = get_vminfo(iommu, gid); + if (!vminfo) + return -EINVAL; + + addr = vminfo->domid_table; + offset = gdom_id << 3; + val = *((u64 *)(addr + offset)); + + return val; +} + +void dump_domain_mapping(struct amd_iommu *iommu, u16 gid, u16 gdom_id) +{ + void *addr; + u64 offset, val; + struct amd_iommu_vminfo *vminfo; + + vminfo = get_vminfo(iommu, gid); + if (!vminfo) + return; + + addr = vminfo->domid_table; + offset = gdom_id << 3; + val = *((u64 *)(addr + offset)); + + pr_debug("%s: offset=%#llx(val=%#llx)\n", __func__, + (unsigned long long)offset, + (unsigned long long)val); +} + +static u16 viommu_get_hdev_id(struct amd_iommu *iommu, u16 guestId, u16 gdev_id) +{ + struct amd_iommu_vminfo *vminfo; + void *addr; + u64 offset; + + vminfo = get_vminfo(iommu, guestId); + if (!vminfo) + return -1; + + addr = vminfo->devid_table; + offset = gdev_id << 4; + return (*((u64 *)(addr + offset)) >> 24) & 0xFFFF; +} + +int amd_viommu_domain_update(struct amd_viommu_dom_info *data, bool is_set) +{ + u16 hdom_id, hdev_id; + int gid = data->gid; + struct amd_iommu *iommu = get_amd_iommu_from_devid(data->iommu_id); + struct dev_table_entry *dev_table = get_dev_table(iommu); + + if (!iommu) + return -ENODEV; + + hdev_id = viommu_get_hdev_id(iommu, gid, data->gdev_id); + hdom_id = dev_table[hdev_id].data[1] & 0xFFFFULL; + + if (is_set) { + set_domain_mapping(iommu, gid, hdom_id, data->gdom_id); + dump_domain_mapping(iommu, 0, data->gdom_id); + } else + clear_domain_mapping(iommu, gid, hdom_id, data->gdom_id); + + return 0; +} +EXPORT_SYMBOL(amd_viommu_domain_update); + static void set_dte_viommu(struct amd_iommu *iommu, u16 hDevId, u16 gid, u16 gDevId) { u64 tmp, dte;