diff mbox series

[1/1] net: axienet: Move reset before DMA detection

Message ID 20230621112630.154373-1-fido_max@inbox.ru
State New
Headers
Series [1/1] net: axienet: Move reset before DMA detection |

Commit Message

Maxim Kochetkov June 21, 2023, 11:26 a.m. UTC 
  DMA detection will fail if axinet was started before (by boot loader,
boot ROM, etc). In this state axinet will not start properly.
So move axinet reset before DMA detection.

Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
---
 drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Pandey, Radhey Shyam June 21, 2023, 12:23 p.m. UTC | #1 
> -----Original Message-----
> From: Maxim Kochetkov <fido_max@inbox.ru>
> Sent: Wednesday, June 21, 2023 4:57 PM
> To: netdev@vger.kernel.org
> Cc: Maxim Kochetkov <fido_max@inbox.ru>; Pandey, Radhey Shyam
> <radhey.shyam.pandey@amd.com>; David S. Miller
> <davem@davemloft.net>; Eric Dumazet <edumazet@google.com>; Jakub
> Kicinski <kuba@kernel.org>; Paolo Abeni <pabeni@redhat.com>; Simek,
> Michal <michal.simek@amd.com>; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: [PATCH 1/1] net: axienet: Move reset before DMA detection
> 
> DMA detection will fail if axinet was started before (by boot loader, boot
> ROM, etc). In this state axinet will not start properly.
> So move axinet reset before DMA detection.

Please provide more detail on the failing testcase. In which scenario we are 
seeing DMA detection failure? What is error log . Is it random?

> 
> Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
> ---
>  drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> index 3e310b55bce2..734822321e0a 100644
> --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> @@ -2042,6 +2042,11 @@ static int axienet_probe(struct platform_device
> *pdev)
>  		goto cleanup_clk;
>  	}
> 
> +	/* Reset core now that clocks are enabled, prior to accessing MDIO
> */
> +	ret = __axienet_device_reset(lp);
> +	if (ret)
> +		goto cleanup_clk;
> +
>  	/* Autodetect the need for 64-bit DMA pointers.
>  	 * When the IP is configured for a bus width bigger than 32 bits,
>  	 * writing the MSB registers is mandatory, even if they are all 0.
> @@ -2096,11 +2101,6 @@ static int axienet_probe(struct platform_device
> *pdev)
>  	lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
>  	lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;
> 
> -	/* Reset core now that clocks are enabled, prior to accessing MDIO
> */
> -	ret = __axienet_device_reset(lp);
> -	if (ret)
> -		goto cleanup_clk;
> -
>  	ret = axienet_mdio_setup(lp);
>  	if (ret)
>  		dev_warn(&pdev->dev,
> --
> 2.40.1
Maxim Kochetkov June 21, 2023, 1:10 p.m. UTC | #2 
On 21.06.2023 15:23, Pandey, Radhey Shyam wrote:
>> -----Original Message-----
>> From: Maxim Kochetkov <fido_max@inbox.ru>
>> Sent: Wednesday, June 21, 2023 4:57 PM
>> To: netdev@vger.kernel.org
>> Cc: Maxim Kochetkov <fido_max@inbox.ru>; Pandey, Radhey Shyam
>> <radhey.shyam.pandey@amd.com>; David S. Miller
>> <davem@davemloft.net>; Eric Dumazet <edumazet@google.com>; Jakub
>> Kicinski <kuba@kernel.org>; Paolo Abeni <pabeni@redhat.com>; Simek,
>> Michal <michal.simek@amd.com>; linux-arm-kernel@lists.infradead.org;
>> linux-kernel@vger.kernel.org
>> Subject: [PATCH 1/1] net: axienet: Move reset before DMA detection
>>
>> DMA detection will fail if axinet was started before (by boot loader, boot
>> ROM, etc). In this state axinet will not start properly.
>> So move axinet reset before DMA detection.
> 
> Please provide more detail on the failing testcase. In which scenario we are
> seeing DMA detection failure? What is error log . Is it random?
> 

XAXIDMA_TX_CDESC_OFFSET + 4 register (MM2S_CURDESC_MSB) is used to 
detect 64 DMA capability here. But datasheet says: When DMACR.RS is 1 
(axinet is in enabled state), CURDESC_PTR becomes Read Only (RO) and is 
used to fetch the first
descriptor. So iowrite32()/ioread32() trick to this register is failed.
Jiri Pirko June 22, 2023, 8:25 a.m. UTC | #3 
Wed, Jun 21, 2023 at 01:26:30PM CEST, fido_max@inbox.ru wrote:
>DMA detection will fail if axinet was started before (by boot loader,
>boot ROM, etc). In this state axinet will not start properly.
>So move axinet reset before DMA detection.
>
>Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>

You are missing a "Fixes:" tag here pointing out to the patch that
introduced the issue.


>---
> drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
>diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
>index 3e310b55bce2..734822321e0a 100644
>--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
>+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
>@@ -2042,6 +2042,11 @@ static int axienet_probe(struct platform_device *pdev)
> 		goto cleanup_clk;
> 	}
> 
>+	/* Reset core now that clocks are enabled, prior to accessing MDIO */
>+	ret = __axienet_device_reset(lp);
>+	if (ret)
>+		goto cleanup_clk;
>+
> 	/* Autodetect the need for 64-bit DMA pointers.
> 	 * When the IP is configured for a bus width bigger than 32 bits,
> 	 * writing the MSB registers is mandatory, even if they are all 0.
>@@ -2096,11 +2101,6 @@ static int axienet_probe(struct platform_device *pdev)
> 	lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
> 	lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;
> 
>-	/* Reset core now that clocks are enabled, prior to accessing MDIO */
>-	ret = __axienet_device_reset(lp);
>-	if (ret)
>-		goto cleanup_clk;
>-
> 	ret = axienet_mdio_setup(lp);
> 	if (ret)
> 		dev_warn(&pdev->dev,
>-- 
>2.40.1
>
>
diff mbox series

Patch

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 3e310b55bce2..734822321e0a 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -2042,6 +2042,11 @@  static int axienet_probe(struct platform_device *pdev)
 		goto cleanup_clk;
 	}
 
+	/* Reset core now that clocks are enabled, prior to accessing MDIO */
+	ret = __axienet_device_reset(lp);
+	if (ret)
+		goto cleanup_clk;
+
 	/* Autodetect the need for 64-bit DMA pointers.
 	 * When the IP is configured for a bus width bigger than 32 bits,
 	 * writing the MSB registers is mandatory, even if they are all 0.
@@ -2096,11 +2101,6 @@  static int axienet_probe(struct platform_device *pdev)
 	lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
 	lp->coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;
 
-	/* Reset core now that clocks are enabled, prior to accessing MDIO */
-	ret = __axienet_device_reset(lp);
-	if (ret)
-		goto cleanup_clk;
-
 	ret = axienet_mdio_setup(lp);
 	if (ret)
 		dev_warn(&pdev->dev,