From patchwork Wed Jun 21 10:01:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Shih X-Patchwork-Id: 110932 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp4251013vqr; Wed, 21 Jun 2023 03:10:59 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ78kmbVySaq4up2lgXjp7rcsOSvFqLrIc8noIJVLliTdSnZgZmthB4dzuKKwDP/2EqiNb7T X-Received: by 2002:a05:6a20:12cb:b0:122:76e8:ea10 with SMTP id v11-20020a056a2012cb00b0012276e8ea10mr4596367pzg.13.1687342258707; Wed, 21 Jun 2023 03:10:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687342258; cv=none; d=google.com; s=arc-20160816; b=seUdobFwShkuKhHIt+G5RpWNsYqpgi77pDgJ1yjc9xZJxxXigIoP8reHSXnUEDVg9D MeGPF6IrDnuuVQ5qxSgVc6Qprs7HPx6b+QDueQ6OLg98TFt48tBS5d7bAaWLfp2Kr7lQ gVDgglc4yI9dP8J9kMMDcyJzwOSHb9KI6q1lBxtu4N8vEsFH+WUStAglTwbudsMhJtdP DWtZS4xcogPQ2HeVHCTWuWrDFh9j+eFSMhs2FXVHh+JWH8nmTvM4eCTTL8bWH9Lf/DRB rXQpJFTznMCYgGKKTlajfdh3Ty8iJU0Vy9eU4uqFxpizSXHpK9KB2wUPlOTm0EqoaAWf AAhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6mAUOxrty6AmI37BzhBqjocn7WAA0N7qiJI7QGB70Gw=; b=vqkMF4w8FA8pDejkxWTX83MDjj3QEqIguNVK13H/HSUeA/nRHVzkvDb5pyzO7MnPuv MPpEmBKw3gi+SzY7f/j/M/Yk+7OjJM9my1HaxLAiKkOGMuNP9qdvHcoYfpCC1ahjOA5f hoemx/kRNoxDtaqWXMKiv7kbOnrrrFhMoH1VQOuKRtJ/vsGE93a2qNroKPEarUAo+jw8 rDYHtJXhsSeHW2il72VMb2hQO2QMNH8Asr7Omvy4iVRtSzq9Sb3NnKtx1qJFviYwXer5 /kuvZvng8iNTDlmwCFZrDw7esJQ39MBN/NvBb1UtY5H1xqCyqC/OptYYPudxCLH07jcQ MJew== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=YH5Olka0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z28-20020aa79e5c000000b0065caa80ad8csi3598839pfq.398.2023.06.21.03.10.43; Wed, 21 Jun 2023 03:10:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20221208 header.b=YH5Olka0; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232331AbjFUKEb (ORCPT + 99 others); Wed, 21 Jun 2023 06:04:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53738 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232255AbjFUKDC (ORCPT ); Wed, 21 Jun 2023 06:03:02 -0400 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 459231718; Wed, 21 Jun 2023 03:02:41 -0700 (PDT) Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-6682909acadso2165343b3a.3; Wed, 21 Jun 2023 03:02:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1687341760; x=1689933760; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6mAUOxrty6AmI37BzhBqjocn7WAA0N7qiJI7QGB70Gw=; b=YH5Olka0V038QCSwQSRUOsJyncBvDtvWEgQbhPypWmiiekNEfuU6onI1YaG3tUXwyr 0SRcFuY8BdaIjO91uZN3conc8ldhdwSFdEYX6hg/jwgbqdZkDIhAPT713xAAIKHD3NHU qtHfR9+GcugDqKQLtm8qaDpjQ5o6EvKNt3O21PYr05Ym9hnV6GPR7DJAcG77263XlWW9 bxmjtHMm0kvjJmpWc5inxI4TttcpjIltCCtm3cM9NrxCSgqz5fCt4Wq2WpwOonKCJ3BD gtiBV4LcyigsJVwq3cuUmRQuHMnrd142wBpVz+OzhS+w5+sWoalR47tF3oCWTwiBynNI r4kQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687341760; x=1689933760; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6mAUOxrty6AmI37BzhBqjocn7WAA0N7qiJI7QGB70Gw=; b=hXalkIrMXf5V2ubuIvSFmXx2LTM23qBMiyhfbLhVYjqU6VTqO1G/rZjlonLBWqQ9Eq TRMbKDF4rjGDuRzUPdx4NjqE4A5veRoo0LGnz6Mo9qMrSfQZrEL6iO8rKBcTE6PZwXLJ SHmCEIRib09WYyVbLYwHeXBAS1oEy5HOxpRdOnW2Vb/XcehpMqmTmOb4SvXClBKsywrF sil/r4wW+WeglVxN30RcAr0WzrM48gXQi/azzTTEMd/TMJEfCYCY3B+nvpninh+bK+y+ rxutyJRzYR5TtLeLWTsmnrxEBDC5/pNOmIwEz/rmv0gjn7jcUeuv+E47XwO6/tUMcpaL pvXg== X-Gm-Message-State: AC+VfDyH+dHR9IgV6t2ZUTRzUt6ctoc3PWIpfjfHQprCrAa0ASM2GlOW 5OdIYQkItWS8X7FFb3uXmnc= X-Received: by 2002:a05:6a00:2d1f:b0:666:b0e7:10ea with SMTP id fa31-20020a056a002d1f00b00666b0e710eamr10339435pfb.31.1687341760582; Wed, 21 Jun 2023 03:02:40 -0700 (PDT) Received: from localhost.localdomain (2001-b400-e254-4eda-2716-05ea-20f5-b048.emome-ip6.hinet.net. [2001:b400:e254:4eda:2716:5ea:20f5:b048]) by smtp.gmail.com with ESMTPSA id g2-20020aa78742000000b0064f46570bb7sm2611196pfo.167.2023.06.21.03.02.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jun 2023 03:02:40 -0700 (PDT) From: Victor Shih To: ulf.hansson@linaro.org, adrian.hunter@intel.com Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, benchuanggli@gmail.com, HL.Liu@genesyslogic.com.tw, Greg.tu@genesyslogic.com.tw, takahiro.akashi@linaro.org, dlunev@chromium.org, Victor Shih , Ben Chuang , Victor Shih Subject: [PATCH V8 14/23] mmc: sdhci-uhs2: add set_ios() Date: Wed, 21 Jun 2023 18:01:42 +0800 Message-Id: <20230621100151.6329-15-victorshihgli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230621100151.6329-1-victorshihgli@gmail.com> References: <20230621100151.6329-1-victorshihgli@gmail.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769306595922371318?= X-GMAIL-MSGID: =?utf-8?q?1769306595922371318?= From: Victor Shih This is a sdhci version of mmc's set_ios operation. It covers both UHS-I and UHS-II. Updates in V8: - Add the judgment formula for MMC_TIMING_SPEED_A_HD, MMC_TIMING_SPEED_B and MMC_TIMING_SPEED_B_HD in __sdhci_uhs2_set_ios(). - Add the switch case for MMC_TIMING_SPEED_A_HD, MMC_TIMING_SPEED_B and MMC_TIMING_SPEED_B_HD in sdhci_get_preset_value(). - mmc_opt_regulator_set_ocr() to instead of mmc_regulator_set_ocr() in sdhci_uhs2_set_ios(). Updates in V7: - Remove unnecessary functions. Updates in V6: - Modify return value in some functions. - Remove unnecessary functions. Signed-off-by: Ben Chuang Signed-off-by: AKASHI Takahiro Signed-off-by: Victor Shih --- drivers/mmc/host/sdhci-uhs2.c | 94 +++++++++++++++++++++++++++++++++++ drivers/mmc/host/sdhci-uhs2.h | 1 + drivers/mmc/host/sdhci.c | 56 +++++++++++++-------- drivers/mmc/host/sdhci.h | 2 + 4 files changed, 132 insertions(+), 21 deletions(-) diff --git a/drivers/mmc/host/sdhci-uhs2.c b/drivers/mmc/host/sdhci-uhs2.c index d519e6ce6199..ad791c48f681 100644 --- a/drivers/mmc/host/sdhci-uhs2.c +++ b/drivers/mmc/host/sdhci-uhs2.c @@ -214,6 +214,70 @@ void sdhci_uhs2_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) } EXPORT_SYMBOL_GPL(sdhci_uhs2_set_timeout); +/** + * sdhci_uhs2_clear_set_irqs - set Error Interrupt Status Enable register + * @host: SDHCI host + * @clear: bit-wise clear mask + * @set: bit-wise set mask + * + * Set/unset bits in UHS-II Error Interrupt Status Enable register + */ +void sdhci_uhs2_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set) +{ + u32 ier; + + ier = sdhci_readl(host, SDHCI_UHS2_INT_STATUS_ENABLE); + ier &= ~clear; + ier |= set; + sdhci_writel(host, ier, SDHCI_UHS2_INT_STATUS_ENABLE); + sdhci_writel(host, ier, SDHCI_UHS2_INT_SIGNAL_ENABLE); +} +EXPORT_SYMBOL_GPL(sdhci_uhs2_clear_set_irqs); + +static void __sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) +{ + struct sdhci_host *host = mmc_priv(mmc); + u8 cmd_res, dead_lock; + u16 ctrl_2; + + /* UHS2 Timeout Control */ + sdhci_calc_timeout_uhs2(host, &cmd_res, &dead_lock); + + /* change to use calculate value */ + cmd_res |= FIELD_PREP(SDHCI_UHS2_TIMER_CTRL_DEADLOCK_MASK, dead_lock); + + sdhci_uhs2_clear_set_irqs(host, + SDHCI_UHS2_INT_CMD_TIMEOUT | + SDHCI_UHS2_INT_DEADLOCK_TIMEOUT, + 0); + sdhci_writeb(host, cmd_res, SDHCI_UHS2_TIMER_CTRL); + sdhci_uhs2_clear_set_irqs(host, 0, + SDHCI_UHS2_INT_CMD_TIMEOUT | + SDHCI_UHS2_INT_DEADLOCK_TIMEOUT); + + /* UHS2 timing. Note, UHS2 timing is disabled when powering off */ + ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); + if (ios->timing == MMC_TIMING_UHS2_SPEED_A || + ios->timing == MMC_TIMING_UHS2_SPEED_A_HD || + ios->timing == MMC_TIMING_UHS2_SPEED_B || + ios->timing == MMC_TIMING_UHS2_SPEED_B_HD) + ctrl_2 |= SDHCI_CTRL_UHS2 | SDHCI_CTRL_UHS2_ENABLE; + else + ctrl_2 &= ~(SDHCI_CTRL_UHS2 | SDHCI_CTRL_UHS2_ENABLE); + sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); + host->timing = ios->timing; + + if (!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) + sdhci_enable_preset_value(host, true); + + if (host->ops->set_power) + host->ops->set_power(host, ios->power_mode, ios->vdd); + else + sdhci_uhs2_set_power(host, ios->power_mode, ios->vdd); + + sdhci_set_clock(host, host->clock); +} + /*****************************************************************************\ * * * MMC callbacks * @@ -235,6 +299,36 @@ static int sdhci_uhs2_start_signal_voltage_switch(struct mmc_host *mmc, return sdhci_start_signal_voltage_switch(mmc, ios); } +static int sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) +{ + struct sdhci_host *host = mmc_priv(mmc); + + pr_debug("%s: clock %uHz powermode %u Vdd %u timing %u\n", + mmc_hostname(mmc), ios->clock, ios->power_mode, ios->vdd, ios->timing); + + if (!sdhci_uhs2_mode(host)) { + sdhci_set_ios(mmc, ios); + return 0; + } + + if (ios->power_mode == MMC_POWER_UNDEFINED) + return 0; + + if (host->flags & SDHCI_DEVICE_DEAD) { + if (ios->power_mode == MMC_POWER_OFF) { + mmc_opt_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); + mmc_opt_regulator_set_ocr(mmc, mmc->supply.vmmc2, 0); + } + return -1; + } + + sdhci_set_ios_common(mmc, ios); + + __sdhci_uhs2_set_ios(mmc, ios); + + return 0; +} + /*****************************************************************************\ * * * Driver init/exit * diff --git a/drivers/mmc/host/sdhci-uhs2.h b/drivers/mmc/host/sdhci-uhs2.h index ccf4e1834c2d..a3641c5f8c77 100644 --- a/drivers/mmc/host/sdhci-uhs2.h +++ b/drivers/mmc/host/sdhci-uhs2.h @@ -181,5 +181,6 @@ void sdhci_uhs2_dump_regs(struct sdhci_host *host); bool sdhci_uhs2_mode(struct sdhci_host *host); void sdhci_uhs2_reset(struct sdhci_host *host, u16 mask); void sdhci_uhs2_set_timeout(struct sdhci_host *host, struct mmc_command *cmd); +void sdhci_uhs2_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set); #endif /* __SDHCI_UHS2_H */ diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index ef344d4edf8f..6e5a9d93a769 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -47,8 +47,6 @@ static unsigned int debug_quirks = 0; static unsigned int debug_quirks2; -static void sdhci_enable_preset_value(struct sdhci_host *host, bool enable); - static bool sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd); void sdhci_dumpregs(struct sdhci_host *host) @@ -1877,6 +1875,12 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host) case MMC_TIMING_MMC_HS400: preset = sdhci_readw(host, SDHCI_PRESET_FOR_HS400); break; + case MMC_TIMING_UHS2_SPEED_A: + case MMC_TIMING_UHS2_SPEED_A_HD: + case MMC_TIMING_UHS2_SPEED_B: + case MMC_TIMING_UHS2_SPEED_B_HD: + preset = sdhci_readw(host, SDHCI_PRESET_FOR_UHS2); + break; default: pr_warn("%s: Invalid UHS-I mode selected\n", mmc_hostname(host->mmc)); @@ -2323,24 +2327,9 @@ static bool sdhci_presetable_values_change(struct sdhci_host *host, struct mmc_i (sdhci_preset_needed(host, ios->timing) || host->drv_type != ios->drv_type); } -void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) +void sdhci_set_ios_common(struct mmc_host *mmc, struct mmc_ios *ios) { struct sdhci_host *host = mmc_priv(mmc); - bool reinit_uhs = host->reinit_uhs; - bool turning_on_clk = false; - u8 ctrl; - - host->reinit_uhs = false; - - if (ios->power_mode == MMC_POWER_UNDEFINED) - return; - - if (host->flags & SDHCI_DEVICE_DEAD) { - if (!IS_ERR(mmc->supply.vmmc) && - ios->power_mode == MMC_POWER_OFF) - mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); - return; - } /* * Reset the chip on each power off. @@ -2357,8 +2346,6 @@ void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) sdhci_enable_preset_value(host, false); if (!ios->clock || ios->clock != host->clock) { - turning_on_clk = ios->clock && !host->clock; - host->ops->set_clock(host, ios->clock); host->clock = ios->clock; @@ -2374,6 +2361,32 @@ void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) mmc->max_busy_timeout /= host->timeout_clk; } } +} +EXPORT_SYMBOL_GPL(sdhci_set_ios_common); + +void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) +{ + struct sdhci_host *host = mmc_priv(mmc); + bool reinit_uhs = host->reinit_uhs; + bool turning_on_clk = false; + u8 ctrl; + + host->reinit_uhs = false; + + if (ios->power_mode == MMC_POWER_UNDEFINED) + return; + + if (host->flags & SDHCI_DEVICE_DEAD) { + if (!IS_ERR(mmc->supply.vmmc) && + ios->power_mode == MMC_POWER_OFF) + mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); + return; + } + + if (!ios->clock || ios->clock != host->clock) + turning_on_clk = ios->clock && !host->clock; + + sdhci_set_ios_common(mmc, ios); if (host->ops->set_power) host->ops->set_power(host, ios->power_mode, ios->vdd); @@ -2957,7 +2970,7 @@ int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) } EXPORT_SYMBOL_GPL(sdhci_execute_tuning); -static void sdhci_enable_preset_value(struct sdhci_host *host, bool enable) +void sdhci_enable_preset_value(struct sdhci_host *host, bool enable) { /* Host Controller v3.00 defines preset value registers */ if (host->version < SDHCI_SPEC_300) @@ -2985,6 +2998,7 @@ static void sdhci_enable_preset_value(struct sdhci_host *host, bool enable) host->preset_enabled = enable; } } +EXPORT_SYMBOL_GPL(sdhci_enable_preset_value); static void sdhci_post_req(struct mmc_host *mmc, struct mmc_request *mrq, int err) diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index f3bd558b337f..03d29423a678 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -847,6 +847,8 @@ void sdhci_set_bus_width(struct sdhci_host *host, int width); void sdhci_reset(struct sdhci_host *host, u8 mask); void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing); int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode); +void sdhci_enable_preset_value(struct sdhci_host *host, bool enable); +void sdhci_set_ios_common(struct mmc_host *mmc, struct mmc_ios *ios); void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios); int sdhci_start_signal_voltage_switch(struct mmc_host *mmc, struct mmc_ios *ios);