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[2620:137:e000::1:20]) by mx.google.com with ESMTP id w15-20020a170902a70f00b001b1a2bf5275si3450980plq.74.2023.06.20.23.46.08; Tue, 20 Jun 2023 23:46:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@geanix.com header.s=default2211 header.b=YzirQapa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=geanix.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230332AbjFUGeG (ORCPT + 99 others); Wed, 21 Jun 2023 02:34:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229830AbjFUGdz (ORCPT ); Wed, 21 Jun 2023 02:33:55 -0400 Received: from www530.your-server.de (www530.your-server.de [188.40.30.78]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D2D6E10D5; Tue, 20 Jun 2023 23:33:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=geanix.com; s=default2211; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID; bh=2CrDY7R+Zqndz7jiijGinHpgv4VdmR4fNUdaajMT4/0=; b=YzirQapaEBcwUEGqksc279sAZg hlI2WIqWdigyPJsBP25Yt+6ilDyGd4GCtjpY/R6Z9/5huk5nDuyTcBP9FvkJ6UV9xjDF190hdHT17 k1za3codVCjPJB1GzpVJdpbAbwZSCOEke8FQrfwbUmWqjbgsQgq9FFuXhdZe3os4uZ0c4rVMqx21W jl8rdEhQwRlis8TxdgKH9U4CfZ72YokELRWfPBAxN1c8SRtiv4wyVzDK2mcdjt9a7HwQSRdBEBm+S VRIyj1WHYZUt0lpDDBoQlna3oZsuaAMD/tK9YpJYZosqwe4H0ki+tJA9u0dzMoXEUsEkGY8xysmPW xiKlXWFQ==; Received: from sslproxy05.your-server.de ([78.46.172.2]) by www530.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1qBrPb-000Mcx-2Y; Wed, 21 Jun 2023 08:33:51 +0200 Received: from [185.17.218.86] (helo=zen..) by sslproxy05.your-server.de with esmtpsa (TLSv1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1qBrPa-0008i1-G3; Wed, 21 Jun 2023 08:33:50 +0200 From: Sean Nyekjaer To: a.fatoum@pengutronix.de, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue Cc: Sean Nyekjaer , dantuguf14105@gmail.com, Olivier Moysan , devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/8] ARM: dts: stm32: Add alternate pinmux for ldtc pins Date: Wed, 21 Jun 2023 08:33:32 +0200 Message-Id: <20230621063339.1361073-2-sean@geanix.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230621063339.1361073-1-sean@geanix.com> References: <20230621063339.1361073-1-sean@geanix.com> MIME-Version: 1.0 X-Authenticated-Sender: sean@geanix.com X-Virus-Scanned: Clear (ClamAV 0.103.8/26945/Tue Jun 20 09:30:24 2023) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,UPPERCASE_50_75,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1769293722694727683?= X-GMAIL-MSGID: =?utf-8?q?1769293722694727683?= Add another mux option for ltdc pins, this is used on Octavo OSD32MP1-RED board. Signed-off-by: Sean Nyekjaer Reviewed-by: Olivier Moysan --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 75 ++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index d79f89f37bc7..422db6dd466c 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -979,6 +979,81 @@ pins { }; }; + ltdc_pins_e: ltdc-4 { + pins1 { + pinmux = , /* LTDC_R0 */ + , /* LTDC_R1 */ + , /* LTDC_R2 */ + , /* LTDC_R3 */ + , /* LTDC_R4 */ + , /* LTDC_R5 */ + , /* LTDC_R6 */ + , /* LTDC_R7 */ + , /* LTDC_G0 */ + , /* LTDC_G1 */ + , /* LTDC_G2 */ + , /* LTDC_G3 */ + , /* LTDC_G4 */ + , /* LTDC_G5 */ + , /* LTDC_G6 */ + , /* LTDC_G7 */ + , /* LTDC_B0 */ + , /* LTDC_B1 */ + , /* LTDC_B2 */ + , /* LTDC_B3 */ + , /* LTDC_B4 */ + , /* LTDC_B5 */ + , /* LTDC_B6 */ + , /* LTDC_B7 */ + , /* LTDC_DE */ + , /* LTDC_VSYNC */ + ; /* LTDC_HSYNC */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + + pins2 { + pinmux = ; /* LTDC_CLK */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + }; + + ltdc_sleep_pins_e: ltdc-sleep-4 { + pins { + pinmux = , /* LTDC_R0 */ + , /* LTDC_R1 */ + , /* LTDC_R2 */ + , /* LTDC_R3 */ + , /* LTDC_R4 */ + , /* LTDC_R5 */ + , /* LTDC_R6 */ + , /* LTDC_R7 */ + , /* LTDC_B0 */ + , /* LTDC_B1 */ + , /* LTDC_B2 */ + , /* LTDC_B3 */ + , /* LTDC_B4 */ + , /* LTDC_B5 */ + , /* LTDC_B6 */ + , /* LTDC_B7 */ + , /* LTDC_G0 */ + , /* LTDC_G1 */ + , /* LTDC_G2 */ + , /* LTDC_G3 */ + , /* LTDC_G4 */ + , /* LTDC_G5 */ + , /* LTDC_G6 */ + , /* LTDC_G7 */ + , /* LTDC_DE */ + , /* LTDC_VSYNC */ + , /* LTDC_HSYNC */ + ; /* LTDC_CLK */ + }; + }; + mco1_pins_a: mco1-0 { pins { pinmux = ; /* MCO1 */