[1/2] arm64: dts: qcom: sc8280xp-crd: Correct vreg_misc_3p3 GPIO

Message ID 20230620203915.141337-1-quic_bjorande@quicinc.com
State New
Headers
Series [1/2] arm64: dts: qcom: sc8280xp-crd: Correct vreg_misc_3p3 GPIO |

Commit Message

Bjorn Andersson June 20, 2023, 8:39 p.m. UTC
  The vreg_misc_3p3 regulator is controlled by PMC8280_1 GPIO 2, not 1, on
the CRD.

Fixes: ccd3517faf18 ("arm64: dts: qcom: sc8280xp: Add reference device")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
  

Comments

Konrad Dybcio June 20, 2023, 8:41 p.m. UTC | #1
On 20.06.2023 22:39, Bjorn Andersson wrote:
> The vreg_misc_3p3 regulator is controlled by PMC8280_1 GPIO 2, not 1, on
> the CRD.
> 
> Fixes: ccd3517faf18 ("arm64: dts: qcom: sc8280xp: Add reference device")
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>  arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> index b566e403d1db..b21b41a066b6 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> @@ -167,7 +167,7 @@ vreg_misc_3p3: regulator-misc-3p3 {
>  		regulator-min-microvolt = <3300000>;
>  		regulator-max-microvolt = <3300000>;
>  
> -		gpio = <&pmc8280_1_gpios 1 GPIO_ACTIVE_HIGH>;
> +		gpio = <&pmc8280_1_gpios 2 GPIO_ACTIVE_HIGH>;
>  		enable-active-high;
>  
>  		pinctrl-names = "default";
> @@ -757,7 +757,7 @@ edp_bl_reg_en: edp-bl-reg-en-state {
>  	};
>  
>  	misc_3p3_reg_en: misc-3p3-reg-en-state {
> -		pins = "gpio1";
> +		pins = "gpio2";
>  		function = "normal";
>  	};
>  };
  
Johan Hovold June 21, 2023, 7:04 a.m. UTC | #2
On Tue, Jun 20, 2023 at 01:39:14PM -0700, Bjorn Andersson wrote:
> The vreg_misc_3p3 regulator is controlled by PMC8280_1 GPIO 2, not 1, on
> the CRD.
> 
> Fixes: ccd3517faf18 ("arm64: dts: qcom: sc8280xp: Add reference device")
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>

The old off-by-one again. Both of these are apparently configured as
outputs and driven high by the boot firmware.

Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>

Johan
  
Bjorn Andersson July 10, 2023, 5:07 a.m. UTC | #3
On Tue, 20 Jun 2023 13:39:14 -0700, Bjorn Andersson wrote:
> The vreg_misc_3p3 regulator is controlled by PMC8280_1 GPIO 2, not 1, on
> the CRD.
> 
> 

Applied, thanks!

[1/2] arm64: dts: qcom: sc8280xp-crd: Correct vreg_misc_3p3 GPIO
      commit: 9566b5271f68bdf6e69b7c511850e3fb75cd18be
[2/2] arm64: dts: qcom: sc8280xp-crd: Fix naming of regulators
      commit: 8882ae076344f8b4e9f1e5a116e1a83c4292b790

Best regards,
  

Patch

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
index b566e403d1db..b21b41a066b6 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
@@ -167,7 +167,7 @@  vreg_misc_3p3: regulator-misc-3p3 {
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 
-		gpio = <&pmc8280_1_gpios 1 GPIO_ACTIVE_HIGH>;
+		gpio = <&pmc8280_1_gpios 2 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
 
 		pinctrl-names = "default";
@@ -757,7 +757,7 @@  edp_bl_reg_en: edp-bl-reg-en-state {
 	};
 
 	misc_3p3_reg_en: misc-3p3-reg-en-state {
-		pins = "gpio1";
+		pins = "gpio2";
 		function = "normal";
 	};
 };