[v2,2/2] mtd: spi-nor: Avoid setting SRWD bit in SR if WP signal not connected
Commit Message
Setting the status register write disable (SRWD) bit in the status
register (SR) with WP signal of the flash not connected will configure the
SR permanently as read-only. If WP signal is not connected, avoid setting
SRWD bit while writing the SR during flash protection.
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
---
drivers/mtd/spi-nor/core.c | 3 +++
drivers/mtd/spi-nor/core.h | 1 +
drivers/mtd/spi-nor/swp.c | 9 +++++++--
3 files changed, 11 insertions(+), 2 deletions(-)
@@ -2864,6 +2864,9 @@ static void spi_nor_init_flags(struct spi_nor *nor)
if (flags & NO_CHIP_ERASE)
nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
+ if (of_property_read_bool(np, "broken-wp"))
+ nor->flags |= SNOR_F_BROKEN_WP;
+
if (flags & SPI_NOR_RWW && nor->info->n_banks > 1 &&
!nor->controller_ops)
nor->flags |= SNOR_F_RWW;
@@ -132,6 +132,7 @@ enum spi_nor_option_flags {
SNOR_F_SWP_IS_VOLATILE = BIT(13),
SNOR_F_RWW = BIT(14),
SNOR_F_ECC = BIT(15),
+ SNOR_F_BROKEN_WP = BIT(16),
};
struct spi_nor_read_command {
@@ -214,8 +214,13 @@ static int spi_nor_sr_lock(struct spi_nor *nor, loff_t ofs, uint64_t len)
status_new = (status_old & ~mask & ~tb_mask) | val;
- /* Disallow further writes if WP pin is asserted */
- status_new |= SR_SRWD;
+ /*
+ * Disallow further writes if WP pin is not broken. WP pin is
+ * considered broken only if the WP signal of the flash device
+ * is not connected.
+ */
+ if (!(nor->flags & SNOR_F_BROKEN_WP))
+ status_new |= SR_SRWD;
if (!use_top)
status_new |= tb_mask;