Message ID | 20230614065949.146187-7-anshuman.khandual@arm.com |
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State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1048354vqr; Wed, 14 Jun 2023 00:04:31 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5x77SRz18Jeg9KKrt1jBtyTlrVrl0/diHbxqORRPsds9bRc2gtkfEVpkYzkRQllUNMU7up X-Received: by 2002:a17:907:5c1:b0:96f:c46f:d8fe with SMTP id wg1-20020a17090705c100b0096fc46fd8femr15794890ejb.27.1686726271247; Wed, 14 Jun 2023 00:04:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1686726271; cv=none; d=google.com; s=arc-20160816; b=z7+z84x6KxWq+xuvO9Lki0RTWcPQVGkSLJzUoE6TGC10lAq6ngjAtJSHThy0sZsPcZ 0PdLydk87ZxeIODno1lCNhF8BWL2vhXWHLEPgbFJuMAEkFKqwEv/hVlH9OYJvjcDZhNp ivPqCyFpawZLJHHXMBrw4ZTt7WQ7UtXW5JsrgDFkxvGBz+r6mV4/ZXqrGSh3xGEPMXKP 4MQPJYw4s6FZSnU+pUkvfSKY5lW94CgGk6UY/zosysxoosndSFagOunVpcfPwX24exPW i9b2N5m1E7H2Yx7rlzuiodgnJ8r9KzJ3723rpk2i3ZzN/NDWvLibRGwDnxTvQnclY2ap WJPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=NgFewRWHFpxv3E2jflCcBc/XGsrEkteI0/9y1TjsQaw=; b=grSNXU9vk1Kxfm+TbjNWhm/RBdc7GjtjMvQR5r8ChcEVGYGW8nZ+mcc871oB90lmcd 2Fjaur0Tc0LPA2rngpiaI5BH26qKdi0cx7EagBlnr1wieV4k4Wm4PtT8GAdSsuaU0RVj q9zN8hlCQ1IemCqd/MFKvWkaeM1OvdoAOn9s1IEPtbFNlHFT/b/cDHUSGV6cNONinX1m +1JDwD2fhxdvrWHXoI+4pq26NLwN56WwLRF1gvdj99JzRXLdbCGyHElzu98nOHlPhT0e 36zPWEuimZhwnz8H/gpXwc18O3vXBH/qwYWQmksHPDgP+tUjWHwMYf1nCw3eSdpidFtJ frjg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v17-20020a170906339100b00973aab0b96esi7537586eja.386.2023.06.14.00.04.06; Wed, 14 Jun 2023 00:04:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243229AbjFNHBC (ORCPT <rfc822;jesperjuhl76@gmail.com> + 99 others); Wed, 14 Jun 2023 03:01:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57280 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243191AbjFNHAr (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 14 Jun 2023 03:00:47 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id ECC661BEF for <linux-kernel@vger.kernel.org>; Wed, 14 Jun 2023 00:00:38 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3D2642F4; Wed, 14 Jun 2023 00:01:23 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.46.15]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8EDF93F663; Wed, 14 Jun 2023 00:00:34 -0700 (PDT) From: Anshuman Khandual <anshuman.khandual@arm.com> To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual <anshuman.khandual@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh@kernel.org>, Suzuki K Poulose <suzuki.poulose@arm.com>, James Morse <james.morse@arm.com>, kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V3 06/14] arm64/sysreg: Rename TRBTRG_EL1 fields per auto-gen tools format Date: Wed, 14 Jun 2023 12:29:41 +0530 Message-Id: <20230614065949.146187-7-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230614065949.146187-1-anshuman.khandual@arm.com> References: <20230614065949.146187-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768660686631693680?= X-GMAIL-MSGID: =?utf-8?q?1768660686631693680?= |
Series |
arm64/sysreg: Convert TRBE registers to automatic generation
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Commit Message
Anshuman Khandual
June 14, 2023, 6:59 a.m. UTC
This renames TRBTRG_EL1 register fields per auto-gen tools format without
causing any functional change in the TRBE driver.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: kvmarm@lists.linux.dev
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
---
arch/arm64/include/asm/sysreg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 8080c52d2fff..4789d932d027 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -281,8 +281,8 @@ #define TRBMAR_EL1_SH_SHIFT 8 #define TRBMAR_EL1_Attr_MASK GENMASK(7, 0) #define TRBMAR_EL1_Attr_SHIFT 0 -#define TRBTRG_TRG_MASK GENMASK(31, 0) -#define TRBTRG_TRG_SHIFT 0 +#define TRBTRG_EL1_TRG_MASK GENMASK(31, 0) +#define TRBTRG_EL1_TRG_SHIFT 0 #define TRBIDR_FLAG BIT(5) #define TRBIDR_PROG BIT(4) #define TRBIDR_ALIGN_MASK GENMASK(3, 0)