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Tue, 13 Jun 2023 09:12:35 -0500 From: Yazen Ghannam To: CC: , , , , , , , , , , Yazen Ghannam Subject: [PATCH 1/3] x86/MCE/AMD: Split amd_mce_is_memory_error() Date: Tue, 13 Jun 2023 09:11:40 -0500 Message-ID: <20230613141142.36801-2-yazen.ghannam@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230613141142.36801-1-yazen.ghannam@amd.com> References: <20230613141142.36801-1-yazen.ghannam@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EDD2:EE_|SA1PR12MB8742:EE_ X-MS-Office365-Filtering-Correlation-Id: 3c1c540b-b785-49ae-0ac5-08db6c183e3c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Dr0S08dREXQY6IH/iGxYLQRP7J0EctZHi7egOw8Qvvs25ZaH3nCXRl7Uk7+BQ/oYRYlm5lr1M0IWR7bFpXrmkRPyO4i5m9NvtiqbXa+XcueQKfeW/tO+xiRIJtmZ6dJvsm1/fpVaxpwzLBH9h2i0Mv1Km9uh5eb9mjLBETqTVU39Rdbop+Bb824asYc7xp6vLH3Y7z/QqaQM45jeGLKGkyib/uEWcYrF2/3e/0NQbqB12bM7dXyfBzenyYjQVBeOghzLfWeuUpQqxgz8PFpSuzp5a1d8SmHeMMw7mYken5S5/MMxFdjq3UzJll+Hlyzpdt5yUYFSmb+y6HD0SiYEGaJB1VoJ/DX/Ch6M0z7b+LdNGJkn+JGXE+KXzoX1PukZDTS0qUrtRyhkATYpjKD+pi05Ec0THmT8iBefMR6hs+6c9DopedIEiCAlBy+V36d42mU/kUysfkGysK2o9NoL2vcTvWOj1ylyxlYFuiU+HqrCf/YSMJB23b7zQtY9UoORvVqJlB9zq9S0H8FeZY/0yu7yM80K4ZeyNVIUYLwlj+njKPTdf6vcWP9fKfFc6aBQ8s5ROQqew+HnJ3V/6/qasQ8MSu5xWtq1eRuy5sRNMJ5qfuok/klUfxvlJWJghdFCwyGVhCZECe38oKbX/0W8dtJCFdR1h6hELNCWz9pfyzNZ51yXinfi+cR5gK2sHlnc5QAAIquW8aQmHBqfn0fKrS1DTlos9KDmaEYYqvFQGdByNX8Caizz56OT6gFtdittoRQI+FuzjTlHyVqCjiZTLQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(39860400002)(346002)(396003)(376002)(451199021)(36840700001)(40470700004)(46966006)(41300700001)(7696005)(6666004)(81166007)(356005)(70586007)(82740400003)(70206006)(2906002)(8936002)(36756003)(8676002)(5660300002)(54906003)(44832011)(6916009)(316002)(86362001)(40480700001)(4326008)(478600001)(40460700003)(336012)(426003)(2616005)(1076003)(16526019)(26005)(186003)(82310400005)(47076005)(83380400001)(36860700001)(36900700001);DIR:OUT;SFP:1101; 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Describe what each function is checking for, and correct the XEC bitmask for SMCA. No functional change intended. Signed-off-by: Yazen Ghannam Reviewed-by: Shuai Xue --- arch/x86/kernel/cpu/mce/amd.c | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c index 5e74610b39e7..1ccfb0c9257f 100644 --- a/arch/x86/kernel/cpu/mce/amd.c +++ b/arch/x86/kernel/cpu/mce/amd.c @@ -713,17 +713,37 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c) deferred_error_interrupt_enable(c); } -bool amd_mce_is_memory_error(struct mce *m) +/* + * DRAM ECC errors are reported in the Northbridge (bank 4) with + * Extended Error Code 8. + */ +static bool legacy_mce_is_memory_error(struct mce *m) +{ + return m->bank == 4 && XEC(m->status, 0x1f) == 8; +} + +/* + * DRAM ECC errors are reported in Unified Memory Controllers with + * Extended Error Code 0. + */ +static bool smca_mce_is_memory_error(struct mce *m) { enum smca_bank_types bank_type; - /* ErrCodeExt[20:16] */ - u8 xec = (m->status >> 16) & 0x1f; + + if (XEC(m->status, 0x3f)) + return false; bank_type = smca_get_bank_type(m->extcpu, m->bank); + + return bank_type == SMCA_UMC || bank_type == SMCA_UMC_V2; +} + +bool amd_mce_is_memory_error(struct mce *m) +{ if (mce_flags.smca) - return (bank_type == SMCA_UMC || bank_type == SMCA_UMC_V2) && xec == 0x0; + return smca_mce_is_memory_error(m); - return m->bank == 4 && xec == 0x8; + return legacy_mce_is_memory_error(m); } static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc)