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[2620:137:e000::1:20]) by mx.google.com with ESMTP id a10-20020a170902ee8a00b001b0191881efsi8382167pld.37.2023.06.13.00.31.15; Tue, 13 Jun 2023 00:31:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=CQBRJGAu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239750AbjFMHFV (ORCPT + 99 others); Tue, 13 Jun 2023 03:05:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239738AbjFMHFQ (ORCPT ); Tue, 13 Jun 2023 03:05:16 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9534173C; Tue, 13 Jun 2023 00:05:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1686639914; x=1718175914; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fRjFS0tyWhibQ8jFtctjzfuGuQJU7LCgPahmmxu6a7A=; b=CQBRJGAu0JvhJFfEp4sebDhUB06zfGs/3ynbNiJXsK+hCEVcIY/zJ6yn wWvWXQQu58Zl0WdRiE6t+BD0E3SRAOWM9Wu2LeTGLIWtNIQxLDBCbRrvF 8A76godPW5pr6OKfyllZ2CuBDLJ2Pv08yxETg0NeK9miYRiJjzJdsdurd 8g8AgWQZOG9i5SWKSV7rM+W63qYmXMgMtJeTRvJzBHAlNo4dLI4O4+mt5 JCRrEyaMRN/PwLnWPlShcfxOTRfEgS94npHMqqAN13VLz3sfHsFl1XzWd xRJpv0YY6/D4thXIKfycorIODtZaCsEzG6IC57R50LfaVX4iA5m6Rns5A A==; X-IronPort-AV: E=Sophos;i="6.00,238,1681196400"; d="scan'208";a="218182139" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Jun 2023 00:05:12 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 13 Jun 2023 00:05:11 -0700 Received: from che-lt-i67131.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Tue, 13 Jun 2023 00:05:02 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , CC: , , , , , , , Manikandan Subject: [PATCH 1/9] dt-bindings: mfd: Add bindings for SAM9X7 LCD controller Date: Tue, 13 Jun 2023 12:34:18 +0530 Message-ID: <20230613070426.467389-2-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230613070426.467389-1-manikandan.m@microchip.com> References: <20230613070426.467389-1-manikandan.m@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768571785243429551?= X-GMAIL-MSGID: =?utf-8?q?1768571785243429551?= Add new compatible string for the XLCD controller on SAM9X7 SoC. Signed-off-by: Manikandan Muralidharan Acked-by: Conor Dooley --- Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt index 5f8880cc757e..7c77b6bf4adb 100644 --- a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt +++ b/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt @@ -8,6 +8,7 @@ Required properties: "atmel,sama5d3-hlcdc" "atmel,sama5d4-hlcdc" "microchip,sam9x60-hlcdc" + "microchip,sam9x7-xlcdc" - reg: base address and size of the HLCDC device registers. - clock-names: the name of the 3 clocks requested by the HLCDC device. Should contain "periph_clk", "sys_clk" and "slow_clk".