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Sun, 11 Jun 2023 23:28:18 -0500 From: Michael Roth To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Brijesh Singh Subject: [PATCH RFC v9 11/51] x86/traps: Define RMP violation #PF error code Date: Sun, 11 Jun 2023 23:25:19 -0500 Message-ID: <20230612042559.375660-12-michael.roth@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230612042559.375660-1-michael.roth@amd.com> References: <20230612042559.375660-1-michael.roth@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9CD:EE_|DS0PR12MB7560:EE_ X-MS-Office365-Filtering-Correlation-Id: e27b4765-fac9-42fc-d1e5-08db6afd7553 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bqCp7dI7Fv/h+/ZknTqMCpt//yb8DFffSDq7a6+PDKu3uLc4SOJ3vmXoEBX20kHv3r+Sr8EsATnXaDGfHP1B4s3UVsmrE2yJhp2/IMo8Ru5CQwvFdKCNF4AiG63cIh9DP87PjvqUo4Mc8kvzt2yscllho9d1JLX9o6FcVrVSHR27N8aSs8WHNioTsxgqe4bFJTlU90dQFe/uVfb88kQ3EZJn3y92Mk99CLOR9pxNPGIYJ+mIPLAwdJdup+ywsbpgAhbDt/97wSkQd4XqtFIi8EH4BnaukBTxTauOf/BvnKdFxn8BJ7e37+Ub5G9S5cjpiTZxXfXPg/L4cRAYS5BUOhy4tvrXM48s1CRYCedkOLKX1tdmGks3IboXRJ4kYsInaitRdrGJf2oD202u2ppMyaJZ7BaHrzq0TFgtiveRspFUG+66aZBzsPwbpN67MjSgUkewKzD/5yTiQj6xfkZ7XVNr2Feckssna7lhWzWtXvhnoLsxntywVvKhc7ieP6HASowb23fXZsu0+WvgGzbnsNjmJuK0apVsde6fOWh5+sLaRt3tQDh+WIsrZNn/1aCdewNaXjIgMh54j5iZgywgypvnFU4XZCjblMi/h3EK3Kb0dKj9y917ZdS/nxhc8NqRwMoE8sSCiOQktK+pm1QTBCm9IVUNyjVOSVw4Lgos44DpDYwT8gbqc7VCgU1z71RQuAj1GYfkM/Y4M6okokkO1hVucLhPfvQrafz8z/WDbQLRCHKLFcnoycthqIE4G+4cN1npeoVlnSFWyKVlhOV0rA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(39860400002)(451199021)(46966006)(40470700004)(36840700001)(16526019)(186003)(426003)(336012)(2616005)(26005)(1076003)(47076005)(36860700001)(82310400005)(70586007)(36756003)(356005)(70206006)(82740400003)(81166007)(4326008)(478600001)(40460700003)(83380400001)(44832011)(86362001)(5660300002)(8936002)(40480700001)(8676002)(7406005)(54906003)(6916009)(7416002)(316002)(41300700001)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jun 2023 04:28:22.9348 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e27b4765-fac9-42fc-d1e5-08db6afd7553 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7560 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1768470132813773934?= X-GMAIL-MSGID: =?utf-8?q?1768470132813773934?= From: Brijesh Singh Bit 31 in the page fault-error bit will be set when processor encounters an RMP violation. While at it, use the BIT_ULL() macro. Signed-off-by: Brijesh Singh Signed-off by: Ashish Kalra Signed-off-by: Michael Roth Acked-by: Dave Hansen --- arch/x86/include/asm/trap_pf.h | 18 +++++++++++------- arch/x86/mm/fault.c | 1 + 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/trap_pf.h b/arch/x86/include/asm/trap_pf.h index 10b1de500ab1..295be06f8db7 100644 --- a/arch/x86/include/asm/trap_pf.h +++ b/arch/x86/include/asm/trap_pf.h @@ -2,6 +2,8 @@ #ifndef _ASM_X86_TRAP_PF_H #define _ASM_X86_TRAP_PF_H +#include /* BIT() macro */ + /* * Page fault error code bits: * @@ -12,15 +14,17 @@ * bit 4 == 1: fault was an instruction fetch * bit 5 == 1: protection keys block access * bit 15 == 1: SGX MMU page-fault + * bit 31 == 1: fault was due to RMP violation */ enum x86_pf_error_code { - X86_PF_PROT = 1 << 0, - X86_PF_WRITE = 1 << 1, - X86_PF_USER = 1 << 2, - X86_PF_RSVD = 1 << 3, - X86_PF_INSTR = 1 << 4, - X86_PF_PK = 1 << 5, - X86_PF_SGX = 1 << 15, + X86_PF_PROT = BIT(0), + X86_PF_WRITE = BIT(1), + X86_PF_USER = BIT(2), + X86_PF_RSVD = BIT(3), + X86_PF_INSTR = BIT(4), + X86_PF_PK = BIT(5), + X86_PF_SGX = BIT(15), + X86_PF_RMP = BIT(31), }; #endif /* _ASM_X86_TRAP_PF_H */ diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index a498ae1fbe66..95791071e3cd 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -546,6 +546,7 @@ show_fault_oops(struct pt_regs *regs, unsigned long error_code, unsigned long ad !(error_code & X86_PF_PROT) ? "not-present page" : (error_code & X86_PF_RSVD) ? "reserved bit violation" : (error_code & X86_PF_PK) ? "protection keys violation" : + (error_code & X86_PF_RMP) ? "RMP violation" : "permissions violation"); if (!(error_code & X86_PF_USER) && user_mode(regs)) {