[v1,1/6] dt-bindings: display/mediatek: mt8188: Add documentations for VDOSYS1
Commit Message
Add device tree documentations for MT8188 VDOSYS1.
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 1 +
.../display/mediatek/mediatek,ethdr.yaml | 5 +-
.../display/mediatek/mediatek,mdp-rdma.yaml | 5 +-
.../display/mediatek/mediatek,merge.yaml | 1 +
.../display/mediatek/mediatek,padding.yaml | 80 +++++++++++++++++++
5 files changed, 90 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml
--
2.18.0
Comments
On Wed, 07 Jun 2023 14:11:16 +0800, Hsiao Chien Sung wrote:
> Add device tree documentations for MT8188 VDOSYS1.
>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
> .../bindings/arm/mediatek/mediatek,mmsys.yaml | 1 +
> .../display/mediatek/mediatek,ethdr.yaml | 5 +-
> .../display/mediatek/mediatek,mdp-rdma.yaml | 5 +-
> .../display/mediatek/mediatek,merge.yaml | 1 +
> .../display/mediatek/mediatek,padding.yaml | 80 +++++++++++++++++++
> 5 files changed, 90 insertions(+), 2 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
./Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml:28:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
./Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml:26:9: [warning] wrong indentation: expected 10 but found 8 (indentation)
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/display/mediatek/mediatek,padding.example.dts:19:18: fatal error: dt-bindings/clock/mt8188-clk.h: No such file or directory
19 | #include <dt-bindings/clock/mt8188-clk.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[1]: *** [scripts/Makefile.lib:419: Documentation/devicetree/bindings/display/mediatek/mediatek,padding.example.dtb] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1512: dt_binding_check] Error 2
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230607061121.6732-2-shawn.sung@mediatek.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
On 07/06/2023 08:11, Hsiao Chien Sung wrote:
> Add device tree documentations for MT8188 VDOSYS1.
It does not look like you tested the bindings, at least after quick
look. Please run `make dt_binding_check` (see
Documentation/devicetree/bindings/writing-schema.rst for instructions).
Maybe you need to update your dtschema and yamllint.
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml
> new file mode 100644
> index 000000000000..8a9e74cbf6dc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml
> @@ -0,0 +1,80 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek PADDING
> +
> +maintainers:
> + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> + - Philipp Zabel <p.zabel@pengutronix.de>
> +
> +description:
> + MediaTek PADDING provides ability to VDOSYS1 to fill pixels to
> + width and height of a layer with a specified color.
> + Since MIXER in VDOSYS1 requires the width of a layer to be 2-pixel-align, or
> + 4-pixel-align when ETHDR is enabled, we need PADDING to deal with odd width.
> + Please notice that even if the PADDING is in bypass mode,
> + settings in the registers must be cleared to 0, otherwise
> + undeinfed behaviors could happen.
Typo, undefined
> +
> +required:
> + - compatible
> + - reg
> + - power-domains
> + - clocks
> + - mediatek,gce-client-reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/mt8188-clk.h>
> + #include <dt-bindings/power/mt8188-power.h>
> + #include <dt-bindings/gce/mt8188-gce.h>
> + #include <dt-bindings/memory/mt8188-memory-port.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + vdo1_padding0: vdo1_padding0@1c11d000 {
No underscores in node names.
Node names should be generic. See also explanation and list of examples
in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
> + compatible = "mediatek,mt8188-vdo1-padding";
> + reg = <0 0x1c11d000 0 0x1000>;
> + clocks = <&vdosys1 CLK_VDO1_PADDING0>;
> + power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>;
> + mediatek,gce-client-reg =
> + <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>;
Wrong wrapping. It's one line. Properties should not be wrapped after '='.
Best regards,
Krzysztof
Hi Krzysztof,
Sorry, I missed this step in my SOP.
Will follow the instruction below to check again,
thank you for the information.
Best regards,
Hsiao Chien Sung
On Wed, 2023-06-07 at 09:26 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>
> On 07/06/2023 08:11, Hsiao Chien Sung wrote:
> > Add device tree documentations for MT8188 VDOSYS1.
>
> It does not look like you tested the bindings, at least after quick
> look. Please run `make dt_binding_check` (see
> Documentation/devicetree/bindings/writing-schema.rst for
> instructions).
> Maybe you need to update your dtschema and yamllint.
>
> > diff --git
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding
> .yaml
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding
> .yaml
> > new file mode 100644
> > index 000000000000..8a9e74cbf6dc
> > --- /dev/null
> > +++
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding
> .yaml
> > @@ -0,0 +1,80 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id:
> http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: MediaTek PADDING
> > +
> > +maintainers:
> > + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> > + - Philipp Zabel <p.zabel@pengutronix.de>
> > +
> > +description:
> > + MediaTek PADDING provides ability to VDOSYS1 to fill pixels to
> > + width and height of a layer with a specified color.
> > + Since MIXER in VDOSYS1 requires the width of a layer to be 2-
> pixel-align, or
> > + 4-pixel-align when ETHDR is enabled, we need PADDING to deal
> with odd width.
> > + Please notice that even if the PADDING is in bypass mode,
> > + settings in the registers must be cleared to 0, otherwise
> > + undeinfed behaviors could happen.
>
> Typo, undefined
>
> > +
>
>
>
> > +required:
> > + - compatible
> > + - reg
> > + - power-domains
> > + - clocks
> > + - mediatek,gce-client-reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/clock/mt8188-clk.h>
> > + #include <dt-bindings/power/mt8188-power.h>
> > + #include <dt-bindings/gce/mt8188-gce.h>
> > + #include <dt-bindings/memory/mt8188-memory-port.h>
> > +
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + vdo1_padding0: vdo1_padding0@1c11d000 {
>
> No underscores in node names.
>
> Node names should be generic. See also explanation and list of
> examples
> in DT specification:
>
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
>
> > + compatible = "mediatek,mt8188-vdo1-padding";
> > + reg = <0 0x1c11d000 0 0x1000>;
> > + clocks = <&vdosys1 CLK_VDO1_PADDING0>;
> > + power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>;
> > + mediatek,gce-client-reg =
> > + <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>;
>
> Wrong wrapping. It's one line. Properties should not be wrapped after
> '='.
>
>
> Best regards,
> Krzysztof
>
Hi, Hsiao-chien:
Separate mmsys part to another patch because it would go through
different maintainer's tree.
Separate padding part to another patch because it's a new device.
Regards,
Chun-Kuang.
Hsiao Chien Sung <shawn.sung@mediatek.com> 於 2023年6月7日 週三 下午2:11寫道:
>
> Add device tree documentations for MT8188 VDOSYS1.
>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
> .../bindings/arm/mediatek/mediatek,mmsys.yaml | 1 +
> .../display/mediatek/mediatek,ethdr.yaml | 5 +-
> .../display/mediatek/mediatek,mdp-rdma.yaml | 5 +-
> .../display/mediatek/mediatek,merge.yaml | 1 +
> .../display/mediatek/mediatek,padding.yaml | 80 +++++++++++++++++++
> 5 files changed, 90 insertions(+), 2 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> index 536f5a5ebd24..642fa2e4736e 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> @@ -32,6 +32,7 @@ properties:
> - mediatek,mt8183-mmsys
> - mediatek,mt8186-mmsys
> - mediatek,mt8188-vdosys0
> + - mediatek,mt8188-vdosys1
> - mediatek,mt8192-mmsys
> - mediatek,mt8195-vdosys1
> - mediatek,mt8195-vppsys0
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
> index 801fa66ae615..e3f740ab0564 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
> @@ -23,7 +23,10 @@ description:
>
> properties:
> compatible:
> - const: mediatek,mt8195-disp-ethdr
> + oneOf:
> + - enum:
> + - mediatek,mt8188-disp-ethdr
> + - mediatek,mt8195-disp-ethdr
>
> reg:
> maxItems: 7
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
> index dd12e2ff685c..07c345fa9178 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml
> @@ -21,7 +21,10 @@ description:
>
> properties:
> compatible:
> - const: mediatek,mt8195-vdo1-rdma
> + oneOf:
> + - enum:
> + - mediatek,mt8188-vdo1-rdma
> + - mediatek,mt8195-vdo1-rdma
>
> reg:
> maxItems: 1
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
> index 2f8e2f4dc3b8..600f1b4608f8 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
> @@ -23,6 +23,7 @@ properties:
> oneOf:
> - enum:
> - mediatek,mt8173-disp-merge
> + - mediatek,mt8188-disp-merge
> - mediatek,mt8195-disp-merge
>
> reg:
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml
> new file mode 100644
> index 000000000000..8a9e74cbf6dc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml
> @@ -0,0 +1,80 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek PADDING
> +
> +maintainers:
> + - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> + - Philipp Zabel <p.zabel@pengutronix.de>
> +
> +description:
> + MediaTek PADDING provides ability to VDOSYS1 to fill pixels to
> + width and height of a layer with a specified color.
> + Since MIXER in VDOSYS1 requires the width of a layer to be 2-pixel-align, or
> + 4-pixel-align when ETHDR is enabled, we need PADDING to deal with odd width.
> + Please notice that even if the PADDING is in bypass mode,
> + settings in the registers must be cleared to 0, otherwise
> + undeinfed behaviors could happen.
> +
> +properties:
> + compatible:
> + const: mediatek,mt8188-vdo1-padding
> +
> + reg:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: RDMA Clock
> +
> + mediatek,gce-client-reg:
> + description:
> + The register of display function block to be set by gce. There are 4 arguments,
> + such as gce node, subsys id, offset and register size. The subsys id that is
> + mapping to the register of display function blocks is defined in the gce header
> + include/dt-bindings/gce/<chip>-gce.h of each chips.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + items:
> + - description: phandle of GCE
> + - description: GCE subsys id
> + - description: register offset
> + - description: register size
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - power-domains
> + - clocks
> + - mediatek,gce-client-reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/mt8188-clk.h>
> + #include <dt-bindings/power/mt8188-power.h>
> + #include <dt-bindings/gce/mt8188-gce.h>
> + #include <dt-bindings/memory/mt8188-memory-port.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + vdo1_padding0: vdo1_padding0@1c11d000 {
> + compatible = "mediatek,mt8188-vdo1-padding";
> + reg = <0 0x1c11d000 0 0x1000>;
> + clocks = <&vdosys1 CLK_VDO1_PADDING0>;
> + power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>;
> + mediatek,gce-client-reg =
> + <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>;
> + };
> + };
> --
> 2.18.0
>
@@ -32,6 +32,7 @@ properties:
- mediatek,mt8183-mmsys
- mediatek,mt8186-mmsys
- mediatek,mt8188-vdosys0
+ - mediatek,mt8188-vdosys1
- mediatek,mt8192-mmsys
- mediatek,mt8195-vdosys1
- mediatek,mt8195-vppsys0
@@ -23,7 +23,10 @@ description:
properties:
compatible:
- const: mediatek,mt8195-disp-ethdr
+ oneOf:
+ - enum:
+ - mediatek,mt8188-disp-ethdr
+ - mediatek,mt8195-disp-ethdr
reg:
maxItems: 7
@@ -21,7 +21,10 @@ description:
properties:
compatible:
- const: mediatek,mt8195-vdo1-rdma
+ oneOf:
+ - enum:
+ - mediatek,mt8188-vdo1-rdma
+ - mediatek,mt8195-vdo1-rdma
reg:
maxItems: 1
@@ -23,6 +23,7 @@ properties:
oneOf:
- enum:
- mediatek,mt8173-disp-merge
+ - mediatek,mt8188-disp-merge
- mediatek,mt8195-disp-merge
reg:
new file mode 100644
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek PADDING
+
+maintainers:
+ - Chun-Kuang Hu <chunkuang.hu@kernel.org>
+ - Philipp Zabel <p.zabel@pengutronix.de>
+
+description:
+ MediaTek PADDING provides ability to VDOSYS1 to fill pixels to
+ width and height of a layer with a specified color.
+ Since MIXER in VDOSYS1 requires the width of a layer to be 2-pixel-align, or
+ 4-pixel-align when ETHDR is enabled, we need PADDING to deal with odd width.
+ Please notice that even if the PADDING is in bypass mode,
+ settings in the registers must be cleared to 0, otherwise
+ undeinfed behaviors could happen.
+
+properties:
+ compatible:
+ const: mediatek,mt8188-vdo1-padding
+
+ reg:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: RDMA Clock
+
+ mediatek,gce-client-reg:
+ description:
+ The register of display function block to be set by gce. There are 4 arguments,
+ such as gce node, subsys id, offset and register size. The subsys id that is
+ mapping to the register of display function blocks is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h of each chips.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle of GCE
+ - description: GCE subsys id
+ - description: register offset
+ - description: register size
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - power-domains
+ - clocks
+ - mediatek,gce-client-reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/mt8188-clk.h>
+ #include <dt-bindings/power/mt8188-power.h>
+ #include <dt-bindings/gce/mt8188-gce.h>
+ #include <dt-bindings/memory/mt8188-memory-port.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ vdo1_padding0: vdo1_padding0@1c11d000 {
+ compatible = "mediatek,mt8188-vdo1-padding";
+ reg = <0 0x1c11d000 0 0x1000>;
+ clocks = <&vdosys1 CLK_VDO1_PADDING0>;
+ power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>;
+ mediatek,gce-client-reg =
+ <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>;
+ };
+ };