[v2] arm64: dts: imx8mp-venice-gw74xx: update to revB PCB

Message ID 20230606152652.1447659-1-tharvey@gateworks.com
State New
Headers
Series [v2] arm64: dts: imx8mp-venice-gw74xx: update to revB PCB |

Commit Message

Tim Harvey June 6, 2023, 3:26 p.m. UTC
  Update the imx8mp-venice-gw74xx for revB:
 - add CAN1
 - add TIS-TPM on SPI2
 - add FAN controller
 - fix PMIC I2C bus (revA PMIC I2C was non-functional so no need for
   backward compatible option)
 - M2 socket GPIO's moved

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2:
 - fix fan-controller unit-address
---
 .../dts/freescale/imx8mp-venice-gw74xx.dts    | 261 +++++++++++-------
 1 file changed, 159 insertions(+), 102 deletions(-)
  

Comments

Shawn Guo June 9, 2023, 2:38 p.m. UTC | #1
On Tue, Jun 06, 2023 at 08:26:52AM -0700, Tim Harvey wrote:
> Update the imx8mp-venice-gw74xx for revB:
>  - add CAN1
>  - add TIS-TPM on SPI2
>  - add FAN controller
>  - fix PMIC I2C bus (revA PMIC I2C was non-functional so no need for
>    backward compatible option)
>  - M2 socket GPIO's moved
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>

../arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts:402.4-17: Warning (reg_format): /soc@0/bus@30800000/i2c@30a20000/gsc@20/fan-controller@a:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format'
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
../arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts:400.20-403.5: Warning (avoid_default_addr_size): /soc@0/bus@30800000/i2c@30a20000/gsc@20/fan-controller@a: Relying on default #address-cells value
../arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts:400.20-403.5: Warning (avoid_default_addr_size): /soc@0/bus@30800000/i2c@30a20000/gsc@20/fan-controller@a: Relying on default #size-cells value

Shawn
  
Tim Harvey June 9, 2023, 7:48 p.m. UTC | #2
On Fri, Jun 9, 2023 at 7:38 AM Shawn Guo <shawnguo@kernel.org> wrote:
>
> On Tue, Jun 06, 2023 at 08:26:52AM -0700, Tim Harvey wrote:
> > Update the imx8mp-venice-gw74xx for revB:
> >  - add CAN1
> >  - add TIS-TPM on SPI2
> >  - add FAN controller
> >  - fix PMIC I2C bus (revA PMIC I2C was non-functional so no need for
> >    backward compatible option)
> >  - M2 socket GPIO's moved
> >
> > Signed-off-by: Tim Harvey <tharvey@gateworks.com>
>
> ../arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts:402.4-17: Warning (reg_format): /soc@0/bus@30800000/i2c@30a20000/gsc@20/fan-controller@a:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
> arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb: Warning (pci_device_reg): Failed prerequisite 'reg_format'
> arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
> arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
> arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
> ../arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts:400.20-403.5: Warning (avoid_default_addr_size): /soc@0/bus@30800000/i2c@30a20000/gsc@20/fan-controller@a: Relying on default #address-cells value
> ../arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts:400.20-403.5: Warning (avoid_default_addr_size): /soc@0/bus@30800000/i2c@30a20000/gsc@20/fan-controller@a: Relying on default #size-cells value
>

Shawn,

Looks like I'm missing an '#address-cells' and '#size-cells' in the
gsc node. I will send a v3.

How do you filter through all the known (and ignored?) warnings that
are failing dtbs_check because various dt-binding yamls which are
either missing or need updates such as the following:

/usr/src/venice/linux-master/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb:
timer@302d0000: compatible: 'oneOf' conditional failed, one must be
fixed:
['fsl,imx8mp-gpt', 'fsl,imx6dl-gpt'] is too long
'fsl,imx1-gpt' was expected
'fsl,imx21-gpt' was expected
'fsl,imx27-gpt' was expected
'fsl,imx31-gpt' was expected
'fsl,imx8mp-gpt' is not one of ['fsl,imx25-gpt', 'fsl,imx50-gpt',
'fsl,imx51-gpt', 'fsl,imx53-gpt', 'fsl,imx6q-gpt']
'fsl,imx6dl-gpt' was expected
'fsl,imx8mp-gpt' is not one of ['fsl,imx6sl-gpt', 'fsl,imx6sx-gpt',
'fsl,imxrt1050-gpt', 'fsl,imxrt1170-gpt']
From schema: /usr/src/venice/linux-master/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
^^^ get this for all the imx gpt timers

arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb:
/soc@0/bus@30800000/spba-bus@30800000/spi@30820000/tpm@0: failed to
match any schema with compatible: ['tcg,tpm_tis-spi']
/usr/src/venice/linux-master/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb:
accelerometer@19: 'interrupt-names' does not match any of the regexes:
'pinctrl-[0-9]+'
From schema: /usr/src/venice/linux-master/Documentation/devicetree/bindings/iio/st,st-sensors.yaml
^^^ is 'interrupt-names = "INT1"' really invalid here?

/usr/src/venice/linux-master/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb:
switch@5f: Unevaluated properties are not allowed ('interrupt-parent',
'interrupts' were unexpected)
From schema: /usr/src/venice/linux-master/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
^^^ microchip,ksz.yaml doesn't describe interrupts yet the driver uses them

/usr/src/venice/linux-master/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb:
wifi@0: compatible: 'oneOf' conditional failed, one must be fixed:
['cypress,cyw4373-fmac'] is too short
'cypress,cyw4373-fmac' is not one of ['brcm,bcm4329-fmac',
'pci14e4,43dc', 'pci14e4,4464', 'pci14e4,4488', 'pci14e4,4425',
'pci14e4,4433']
From schema: /usr/src/venice/linux-master/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml
^^^ This one I don't understand at all - brcm,bcm4329-fmac.yaml
defines 'cypress,cyw4373-fmac under oneOf/items/enum but not
oneOf/enum???

/usr/src/venice/linux-master/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb:
pcie@33800000: Unevaluated properties are not allowed
('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks'
were unexpected)
From schema: /usr/src/venice/linux-master/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
^^^ we get this on all imx with pcie

/usr/src/venice/linux-master/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb:
usb@32f10100: usb@38100000: Unevaluated properties are not allowed
('connector' was unexpected)
From schema: /usr/src/venice/linux-master/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
/usr/src/venice/linux-master/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb:
usb@38100000: Unevaluated properties are not allowed ('connector' was
unexpected)
From schema: /usr/src/venice/linux-master/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
^^^ fsl,imx8mp-dwc3.yaml doesn't document connector nodes

arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dtb: /pps: failed
to match any schema with compatible: ['pps-gpio']
^^^ need a pps-gpio.yaml

Is there a way to skip certain schemas or some multi-line grep -v
pattern you are using?

I've noticed a lot of contributors putting time into dt-bindings to
pass schema checks and things are getting cleaned up fairly quickly.

Best Regards,

Tim
  

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
index eb51d648359b..764ff8b5c01b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
@@ -125,12 +125,22 @@  reg_usb2_vbus: regulator-usb2 {
 		regulator-max-microvolt = <5000000>;
 	};
 
+	reg_can1_stby: regulator-can1-stby {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_reg_can1>;
+		regulator-name = "can1_stby";
+		gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
 	reg_can2_stby: regulator-can2-stby {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_reg_can>;
+		pinctrl-0 = <&pinctrl_reg_can2>;
 		regulator-name = "can2_stby";
-		gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
+		gpio = <&gpio5 5 GPIO_ACTIVE_LOW>;
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 	};
@@ -164,6 +174,21 @@  &A53_3 {
 	cpu-supply = <&reg_arm>;
 };
 
+&ecspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spi1>;
+	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+	status = "okay";
+
+	tpm@0 {
+		compatible = "tcg,tpm_tis-spi";
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		reg = <0x0>;
+		spi-max-frequency = <36000000>;
+	};
+};
+
 /* off-board header */
 &ecspi2 {
 	pinctrl-names = "default";
@@ -204,6 +229,13 @@  fixed-link {
 	};
 };
 
+&flexcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan1>;
+	xceiver-supply = <&reg_can1_stby>;
+	status = "okay";
+};
+
 &flexcan2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_flexcan2>;
@@ -214,38 +246,38 @@  &flexcan2 {
 &gpio1 {
 	gpio-line-names =
 		"", "", "", "", "", "", "", "",
-		"", "", "dio0", "", "dio1", "", "", "",
+		"", "dio0", "", "dio1", "", "", "", "",
 		"", "", "", "", "", "", "", "",
 		"", "", "", "", "", "", "", "";
 };
 
 &gpio2 {
 	gpio-line-names =
-		"", "", "", "", "", "", "", "",
-		"", "", "", "", "", "", "pcie3_wdis#", "",
+		"", "", "", "", "", "", "m2_pin20", "",
+		"", "", "", "", "", "pcie1_wdis#", "pcie3_wdis#", "",
 		"", "", "pcie2_wdis#", "", "", "", "", "",
 		"", "", "", "", "", "", "", "";
 };
 
 &gpio3 {
 	gpio-line-names =
-		"m2_gdis#", "", "", "", "", "", "", "m2_rst#",
+		"", "", "", "", "", "", "m2_rst", "",
+		"", "", "", "", "", "", "", "",
 		"", "", "", "", "", "", "", "",
-		"m2_off#", "", "", "", "", "", "", "",
 		"", "", "", "", "", "", "", "";
 };
 
 &gpio4 {
 	gpio-line-names =
+		"", "", "m2_off#", "", "", "", "", "",
 		"", "", "", "", "", "", "", "",
-		"", "", "", "", "", "", "", "",
-		"", "", "", "", "m2_wdis#", "", "", "",
-		"", "", "", "", "", "", "", "uart_rs485";
+		"", "", "m2_wdis#", "", "", "", "", "",
+		"", "", "", "", "", "", "", "rs485_en";
 };
 
 &gpio5 {
 	gpio-line-names =
-		"uart_half", "uart_term", "", "", "", "", "", "",
+		"rs485_hd", "rs485_term", "", "", "", "", "", "",
 		"", "", "", "", "", "", "", "",
 		"", "", "", "", "", "", "", "",
 		"", "", "", "", "", "", "", "";
@@ -286,6 +318,12 @@  channel@8 {
 				label = "vdd_bat";
 			};
 
+			channel@16 {
+				gw,mode = <4>;
+				reg = <0x16>;
+				label = "fan_tach";
+			};
+
 			channel@82 {
 				gw,mode = <2>;
 				reg = <0x82>;
@@ -358,6 +396,11 @@  channel@a2 {
 				gw,voltage-divider-ohms = <10000 10000>;
 			};
 		};
+
+		fan-controller@a {
+			compatible = "gw,gsc-fan";
+			reg = <0x0a>;
+		};
 	};
 
 	gpio: gpio@23 {
@@ -369,85 +412,6 @@  gpio: gpio@23 {
 		interrupts = <4>;
 	};
 
-	pmic@25 {
-		compatible = "nxp,pca9450c";
-		reg = <0x25>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_pmic>;
-		interrupt-parent = <&gpio3>;
-		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
-
-		regulators {
-			BUCK1 {
-				regulator-name = "BUCK1";
-				regulator-min-microvolt = <720000>;
-				regulator-max-microvolt = <1000000>;
-				regulator-boot-on;
-				regulator-always-on;
-				regulator-ramp-delay = <3125>;
-			};
-
-			reg_arm: BUCK2 {
-				regulator-name = "BUCK2";
-				regulator-min-microvolt = <720000>;
-				regulator-max-microvolt = <1025000>;
-				regulator-boot-on;
-				regulator-always-on;
-				regulator-ramp-delay = <3125>;
-				nxp,dvs-run-voltage = <950000>;
-				nxp,dvs-standby-voltage = <850000>;
-			};
-
-			BUCK4 {
-				regulator-name = "BUCK4";
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3600000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			BUCK5 {
-				regulator-name = "BUCK5";
-				regulator-min-microvolt = <1650000>;
-				regulator-max-microvolt = <1950000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			BUCK6 {
-				regulator-name = "BUCK6";
-				regulator-min-microvolt = <1045000>;
-				regulator-max-microvolt = <1155000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			LDO1 {
-				regulator-name = "LDO1";
-				regulator-min-microvolt = <1650000>;
-				regulator-max-microvolt = <1950000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			LDO3 {
-				regulator-name = "LDO3";
-				regulator-min-microvolt = <1710000>;
-				regulator-max-microvolt = <1890000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			LDO5 {
-				regulator-name = "LDO5";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-		};
-	};
-
 	eeprom@50 {
 		compatible = "atmel,24c02";
 		reg = <0x50>;
@@ -559,7 +523,6 @@  fixed-link {
 	};
 };
 
-/* off-board header */
 &i2c3 {
 	clock-frequency = <400000>;
 	pinctrl-names = "default", "gpio";
@@ -568,6 +531,85 @@  &i2c3 {
 	scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 	sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 	status = "okay";
+
+	pmic@25 {
+		compatible = "nxp,pca9450c";
+		reg = <0x25>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_pmic>;
+		interrupt-parent = <&gpio3>;
+		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+
+		regulators {
+			BUCK1 {
+				regulator-name = "BUCK1";
+				regulator-min-microvolt = <720000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <3125>;
+			};
+
+			reg_arm: BUCK2 {
+				regulator-name = "BUCK2";
+				regulator-min-microvolt = <720000>;
+				regulator-max-microvolt = <1025000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <3125>;
+				nxp,dvs-run-voltage = <950000>;
+				nxp,dvs-standby-voltage = <850000>;
+			};
+
+			BUCK4 {
+				regulator-name = "BUCK4";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3600000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			BUCK5 {
+				regulator-name = "BUCK5";
+				regulator-min-microvolt = <1650000>;
+				regulator-max-microvolt = <1950000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			BUCK6 {
+				regulator-name = "BUCK6";
+				regulator-min-microvolt = <1045000>;
+				regulator-max-microvolt = <1155000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			LDO1 {
+				regulator-name = "LDO1";
+				regulator-min-microvolt = <1650000>;
+				regulator-max-microvolt = <1950000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			LDO3 {
+				regulator-name = "LDO3";
+				regulator-min-microvolt = <1710000>;
+				regulator-max-microvolt = <1890000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			LDO5 {
+				regulator-name = "LDO5";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
 };
 
 /* off-board header */
@@ -726,12 +768,14 @@  pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09	0x40000040 /* DIO0 */
 			MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11	0x40000040 /* DIO1 */
-			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14	0x40000040 /* M2SKT_OFF# */
-			MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18	0x40000150 /* PCIE2_WDIS# */
+			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02	0x40000040 /* M2SKT_OFF# */
+			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x40000150 /* M2SKT_WDIS# */
+			MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06	0x40000040 /* M2SKT_PIN20 */
+			MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11	0x40000040 /* M2SKT_PIN22 */
+			MX8MP_IOMUXC_SD2_CLK__GPIO2_IO13	0x40000150 /* PCIE1_WDIS# */
 			MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14	0x40000150 /* PCIE3_WDIS# */
+			MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18	0x40000150 /* PCIE2_WDIS# */
 			MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06	0x40000040 /* M2SKT_RST# */
-			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x40000150 /* M2SKT_WDIS# */
-			MX8MP_IOMUXC_NAND_ALE__GPIO3_IO00	0x40000150 /* M2SKT_GDIS# */
 			MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01	0x40000104 /* UART_TERM */
 			MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31	0x40000104 /* UART_RS485 */
 			MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00	0x40000104 /* UART_HALF */
@@ -784,6 +828,13 @@  MX8MP_IOMUXC_SAI1_RXC__ENET1_1588_EVENT0_OUT	0x140
 		>;
 	};
 
+	pinctrl_flexcan1: flexcan1grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SPDIF_RX__CAN1_RX		0x154
+			MX8MP_IOMUXC_SPDIF_TX__CAN1_TX		0x154
+		>;
+	};
+
 	pinctrl_flexcan2: flexcan2grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX		0x154
@@ -869,7 +920,7 @@  MX8MP_IOMUXC_SD2_DATA1__GPIO2_IO16	0x10
 
 	pinctrl_pcie0: pciegrp {
 		fsl,pins = <
-			MX8MP_IOMUXC_SD2_DATA2__GPIO2_IO17	0x110
+			MX8MP_IOMUXC_SD2_DATA2__GPIO2_IO17	0x106
 		>;
 	};
 
@@ -885,12 +936,18 @@  MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12	0x140
 		>;
 	};
 
-	pinctrl_reg_can: regcangrp {
+	pinctrl_reg_can1: regcan1grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19	0x154
 		>;
 	};
 
+	pinctrl_reg_can2: regcan2grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05	0x154
+		>;
+	};
+
 	pinctrl_reg_usb2: regusb2grp {
 		fsl,pins = <
 			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06	0x140
@@ -903,12 +960,12 @@  MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09	0x110
 		>;
 	};
 
-	pinctrl_sai2: sai2grp {
+	pinctrl_spi1: spi1grp {
 		fsl,pins = <
-			MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC	0xd6
-			MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00	0xd6
-			MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK	0xd6
-			MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI2_MCLK	0xd6
+			MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK	0x82
+			MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI	0x82
+			MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO	0x82
+			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09	0x140
 		>;
 	};