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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ou41-20020a05620a622900b0075d2f55e0ebsi5949751qkn.536.2023.06.06.08.13.53; Tue, 06 Jun 2023 08:14:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@geanix.com header.s=default2211 header.b=VGUVRSn3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=geanix.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238535AbjFFO5O (ORCPT + 99 others); Tue, 6 Jun 2023 10:57:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238491AbjFFO4w (ORCPT ); Tue, 6 Jun 2023 10:56:52 -0400 Received: from www530.your-server.de (www530.your-server.de [188.40.30.78]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59E9F1707; Tue, 6 Jun 2023 07:56:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=geanix.com; s=default2211; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID; bh=IHC41y3LgS8ynZWRUyo4kJuRV/JGlD0ZzhWOJdndh/4=; b=VGUVRSn3qWKOBDar5et3pJbmQa jf/VFOmgX3YSsCNUwxG5gwV+OmEXTuMfRUAy/NRBF65YUOUB5ZhWBKLCInxZvb97QgMRnXvOeLOpk rpolUMxnk58Y/5/nKHGbdnOqpg30HFMAYMprgu2MqHBX06DGrcH954KL8vGlSNempqxaVN/JOs7R6 KtrCeGl50vau7n5iyW7Km/EC0r2p+ZNtYUadYkQ4j3Rw2cwX6MmR0/z1ta+amiTBBiiy9Ht1QWSkP kcfaNB3TyyTigfrmKvS50KSZcXUKjcK2BpzhLxjTauugMw8VE44NY3gcUpdyQK3bCU6WnJrVnPg0Q UKHW2pxg==; Received: from sslproxy05.your-server.de ([78.46.172.2]) by www530.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1q6Y6j-000Pn6-DG; Tue, 06 Jun 2023 16:56:25 +0200 Received: from [185.17.218.86] (helo=zen..) by sslproxy05.your-server.de with esmtpsa (TLSv1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1q6Y6i-0006D0-RS; Tue, 06 Jun 2023 16:56:24 +0200 From: Sean Nyekjaer To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue Cc: Sean Nyekjaer , dantuguf14105@gmail.com, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 3/5] ARM: dts: stm32: Add alternate pinmux for can pins Date: Tue, 6 Jun 2023 16:55:52 +0200 Message-Id: <20230606145555.2155664-3-sean@geanix.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230606145555.2155664-1-sean@geanix.com> References: <20230606145555.2155664-1-sean@geanix.com> MIME-Version: 1.0 X-Authenticated-Sender: sean@geanix.com X-Virus-Scanned: Clear (ClamAV 0.103.8/26930/Tue Jun 6 09:25:07 2023) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767966714713569555?= X-GMAIL-MSGID: =?utf-8?q?1767966714713569555?= Add another mux option for can pins, this is used on Octavo OSD32MP1-RED board. Signed-off-by: Sean Nyekjaer --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 422db6dd466c..537908a20efb 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1144,6 +1144,26 @@ pins { }; }; + m_can1_pins_d: m-can1-3 { + pins1 { + pinmux = ; /* CAN1_TX */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-disable; + }; + }; + + m_can1_sleep_pins_d: m_can1-sleep-3 { + pins { + pinmux = , /* CAN1_TX */ + ; /* CAN1_RX */ + }; + }; + m_can2_pins_a: m-can2-0 { pins1 { pinmux = ; /* CAN2_TX */