Message ID | 20230606114927.227a66a5@canb.auug.org.au |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id e12-20020a17090301cc00b001ac9a3ebb38si6369296plh.360.2023.06.05.19.02.14; Mon, 05 Jun 2023 19:02:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@canb.auug.org.au header.s=201702 header.b=CdNHa2ki; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=canb.auug.org.au Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230212AbjFFBu6 (ORCPT <rfc822;xxoosimple@gmail.com> + 99 others); Mon, 5 Jun 2023 21:50:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231844AbjFFBus (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 5 Jun 2023 21:50:48 -0400 Received: from gandalf.ozlabs.org (mail.ozlabs.org [IPv6:2404:9400:2221:ea00::3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 919F9E54; Mon, 5 Jun 2023 18:50:20 -0700 (PDT) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4QZtgs2hWWz4x1f; Tue, 6 Jun 2023 11:49:28 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canb.auug.org.au; s=201702; t=1686016170; bh=9XXm/QR5J7nxa7/gwe/mYjN3Je4hD6qAuS55zZUHYAU=; h=Date:From:To:Cc:Subject:From; b=CdNHa2ki9JcNnl7r8mitNMwcyXFXWyiAIqDWB96i/9d/FmJ11o2JVrWRh3tJa4Zzh tyDmC5mueCDPHMZw/LaD5l8vqGGNjzr2BB3TnHPT//Xrki8LkDFYO8heX/J8vF/sLb mkDuckw2QKTJQrEqky3FAFskE365eK9XCxyM1w8ryPr5p2l3wTClDUiQRgJDN4CKP1 QCts/y+YMi1QhHymSjBTwFFGfCIq7qTaBKNLtnyCavZK1BDYDV2+VSBm59F7m2VJXS eSVwsWxhV44v0KrLuXvUu4meXM49G2nXDu7mdDixK5Jd5pJ3o4dhGV/+wxD6yJbX5C RB26o5dtEU4rg== Date: Tue, 6 Jun 2023 11:49:27 +1000 From: Stephen Rothwell <sfr@canb.auug.org.au> To: Christoffer Dall <cdall@cs.columbia.edu>, Marc Zyngier <maz@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org> Cc: Joey Gouly <joey.gouly@arm.com>, Kristina Martsenko <kristina.martsenko@arm.com>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Linux Next Mailing List <linux-next@vger.kernel.org>, Oliver Upton <oliver.upton@linux.dev> Subject: linux-next: manual merge of the kvm-arm tree with the arm64 tree Message-ID: <20230606114927.227a66a5@canb.auug.org.au> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="Sig_/XVrtAiSNcUo33DlqVi4Wb7U"; protocol="application/pgp-signature"; micalg=pgp-sha256 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_MED,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767916905808450913?= X-GMAIL-MSGID: =?utf-8?q?1767916905808450913?= |
Series |
linux-next: manual merge of the kvm-arm tree with the arm64 tree
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Commit Message
Stephen Rothwell
June 6, 2023, 1:49 a.m. UTC
Hi all, Today's linux-next merge of the kvm-arm tree got a conflict in: arch/arm64/kernel/cpufeature.c between commits: b7564127ffcb ("arm64: mops: detect and enable FEAT_MOPS") c1fa32c8f189 ("arm64: cpufeature: add TCR2 cpucap") b5a8e35236ee ("arm64: cpufeature: add Permission Indirection Extension cpucap") from the arm64 tree and commit: c876c3f182a5 ("KVM: arm64: Relax trapping of CTR_EL0 when FEAT_EVT is available") from the kvm-arm tree. I fixed it up (see below) and can carry the fix as necessary. This is now fixed as far as linux-next is concerned, but any non trivial conflicts should be mentioned to your upstream maintainer when your tree is submitted for merging. You may also want to consider cooperating with the maintainer of the conflicting tree to minimise any particularly complex conflicts.
Comments
On Tue, Jun 06, 2023 at 11:49:27AM +1000, Stephen Rothwell wrote: > diff --cc arch/arm64/kernel/cpufeature.c > index a74f41c7280f,4a2ab3f366de..000000000000 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@@ -2662,35 -2641,17 +2662,46 @@@ static const struct arm64_cpu_capabilit > .cpu_enable = cpu_enable_dit, > ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, DIT, IMP) > }, > + { > + .desc = "Memory Copy and Memory Set instructions", > + .capability = ARM64_HAS_MOPS, > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > + .matches = has_cpuid_feature, > + .cpu_enable = cpu_enable_mops, > + ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, MOPS, IMP) > + }, > + { > + .capability = ARM64_HAS_TCR2, > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > + .sys_reg = SYS_ID_AA64MMFR3_EL1, > + .sign = FTR_UNSIGNED, > + .field_pos = ID_AA64MMFR3_EL1_TCRX_SHIFT, > + .field_width = 4, > + .min_field_value = ID_AA64MMFR3_EL1_TCRX_IMP, > + .matches = has_cpuid_feature, > + }, > + { > + .desc = "Stage-1 Permission Indirection Extension (S1PIE)", > + .capability = ARM64_HAS_S1PIE, > + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, > + .sys_reg = SYS_ID_AA64MMFR3_EL1, > + .sign = FTR_UNSIGNED, > + .field_pos = ID_AA64MMFR3_EL1_S1PIE_SHIFT, > + .field_width = 4, > + .min_field_value = ID_AA64MMFR3_EL1_S1PIE_IMP, > + .matches = has_cpuid_feature, > + }, > + { > + .desc = "Enhanced Virtualization Traps", > + .capability = ARM64_HAS_EVT, > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > + .sys_reg = SYS_ID_AA64MMFR2_EL1, > + .sign = FTR_UNSIGNED, > + .field_pos = ID_AA64MMFR2_EL1_EVT_SHIFT, > + .field_width = 4, > + .min_field_value = ID_AA64MMFR2_EL1_EVT_IMP, > + .matches = has_cpuid_feature, > + }, > {}, > }; Thanks Stephen. It looks fine.
Hi all, On Tue, 6 Jun 2023 11:49:27 +1000 Stephen Rothwell <sfr@canb.auug.org.au> wrote: > > Today's linux-next merge of the kvm-arm tree got a conflict in: > > arch/arm64/kernel/cpufeature.c > > between commits: > > b7564127ffcb ("arm64: mops: detect and enable FEAT_MOPS") > c1fa32c8f189 ("arm64: cpufeature: add TCR2 cpucap") > b5a8e35236ee ("arm64: cpufeature: add Permission Indirection Extension cpucap") > > from the arm64 tree and commit: > > c876c3f182a5 ("KVM: arm64: Relax trapping of CTR_EL0 when FEAT_EVT is available") > > from the kvm-arm tree. > > I fixed it up (see below) and can carry the fix as necessary. This > is now fixed as far as linux-next is concerned, but any non trivial > conflicts should be mentioned to your upstream maintainer when your tree > is submitted for merging. You may also want to consider cooperating > with the maintainer of the conflicting tree to minimise any particularly > complex conflicts. Commit b5a8e35236ee changed a bit, so the new resolution is below.
On Wed, Jun 07, 2023 at 11:05:21AM +1000, Stephen Rothwell wrote: > Hi all, > > On Tue, 6 Jun 2023 11:49:27 +1000 Stephen Rothwell <sfr@canb.auug.org.au> wrote: > > > > Today's linux-next merge of the kvm-arm tree got a conflict in: > > > > arch/arm64/kernel/cpufeature.c > > > > between commits: > > > > b7564127ffcb ("arm64: mops: detect and enable FEAT_MOPS") > > c1fa32c8f189 ("arm64: cpufeature: add TCR2 cpucap") > > b5a8e35236ee ("arm64: cpufeature: add Permission Indirection Extension cpucap") > > > > from the arm64 tree and commit: > > > > c876c3f182a5 ("KVM: arm64: Relax trapping of CTR_EL0 when FEAT_EVT is available") > > > > from the kvm-arm tree. > > > > I fixed it up (see below) and can carry the fix as necessary. This > > is now fixed as far as linux-next is concerned, but any non trivial > > conflicts should be mentioned to your upstream maintainer when your tree > > is submitted for merging. You may also want to consider cooperating > > with the maintainer of the conflicting tree to minimise any particularly > > complex conflicts. > > Commit b5a8e35236ee changed a bit, so the new resolution is below. LGTM, thanks Stephen. Catalin, I'm only planning on dragging in the MOPS branch as needed due to some more involved conflicts that'll arise from KVM ID register changes. Otherwise the resolution seems trivial enough and doesn't need to be explicitly dealt with. Still learning the ropes, so all ears if anyone disagrees :) > diff --cc arch/arm64/kernel/cpufeature.c > index c3bdb14bb4bd,4a2ab3f366de..000000000000 > --- a/arch/arm64/kernel/cpufeature.c > +++ b/arch/arm64/kernel/cpufeature.c > @@@ -2662,27 -2641,17 +2662,38 @@@ static const struct arm64_cpu_capabilit > .cpu_enable = cpu_enable_dit, > ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, DIT, IMP) > }, > + { > + .desc = "Memory Copy and Memory Set instructions", > + .capability = ARM64_HAS_MOPS, > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > + .matches = has_cpuid_feature, > + .cpu_enable = cpu_enable_mops, > + ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, MOPS, IMP) > + }, > + { > + .capability = ARM64_HAS_TCR2, > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > + .matches = has_cpuid_feature, > + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, TCRX, IMP) > + }, > + { > + .desc = "Stage-1 Permission Indirection Extension (S1PIE)", > + .capability = ARM64_HAS_S1PIE, > + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, > + .matches = has_cpuid_feature, > + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1PIE, IMP) > + }, > + { > + .desc = "Enhanced Virtualization Traps", > + .capability = ARM64_HAS_EVT, > + .type = ARM64_CPUCAP_SYSTEM_FEATURE, > + .sys_reg = SYS_ID_AA64MMFR2_EL1, > + .sign = FTR_UNSIGNED, > + .field_pos = ID_AA64MMFR2_EL1_EVT_SHIFT, > + .field_width = 4, > + .min_field_value = ID_AA64MMFR2_EL1_EVT_IMP, > + .matches = has_cpuid_feature, > + }, > {}, > }; >
On Wed, Jun 07, 2023 at 05:33:53AM +0000, Oliver Upton wrote: > On Wed, Jun 07, 2023 at 11:05:21AM +1000, Stephen Rothwell wrote: > > On Tue, 6 Jun 2023 11:49:27 +1000 Stephen Rothwell <sfr@canb.auug.org.au> wrote: > > > Today's linux-next merge of the kvm-arm tree got a conflict in: > > > > > > arch/arm64/kernel/cpufeature.c > > > > > > between commits: > > > > > > b7564127ffcb ("arm64: mops: detect and enable FEAT_MOPS") > > > c1fa32c8f189 ("arm64: cpufeature: add TCR2 cpucap") > > > b5a8e35236ee ("arm64: cpufeature: add Permission Indirection Extension cpucap") > > > > > > from the arm64 tree and commit: > > > > > > c876c3f182a5 ("KVM: arm64: Relax trapping of CTR_EL0 when FEAT_EVT is available") > > > > > > from the kvm-arm tree. > > > > > > I fixed it up (see below) and can carry the fix as necessary. This > > > is now fixed as far as linux-next is concerned, but any non trivial > > > conflicts should be mentioned to your upstream maintainer when your tree > > > is submitted for merging. You may also want to consider cooperating > > > with the maintainer of the conflicting tree to minimise any particularly > > > complex conflicts. > > > > Commit b5a8e35236ee changed a bit, so the new resolution is below. Thanks Stephen. I regenerated the arm64 for-next/feat_s1pie branch since the old one was not archived on lore. While doing that, there were some minor fixups. > Catalin, I'm only planning on dragging in the MOPS branch as needed > due to some more involved conflicts that'll arise from KVM ID register > changes. Otherwise the resolution seems trivial enough and doesn't need > to be explicitly dealt with. Still learning the ropes, so all ears if > anyone disagrees :) If there are trivial conflicts, we usually leave them in (Linus doesn't mind). For anything non-obvious, feel free to pull the relevant branches from the arm64 tree into the KVM one. I don't plan to rebase any of them now.
diff --cc arch/arm64/kernel/cpufeature.c index a74f41c7280f,4a2ab3f366de..000000000000 --- a/arch/arm64/kernel/cpufeature.c