From patchwork Mon Jun 5 07:01:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 103108 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp2497619vqr; Mon, 5 Jun 2023 00:03:36 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ7nCdcWYE3ZNMYzebXUaMM7AxAxYRh/N7CTp/tkPIRJdTV3oDqqTKsR+cqc7wQVR9Z7g+dc X-Received: by 2002:a17:90a:d501:b0:256:2b45:8e1a with SMTP id t1-20020a17090ad50100b002562b458e1amr3474037pju.25.1685948616183; Mon, 05 Jun 2023 00:03:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685948616; cv=none; d=google.com; s=arc-20160816; b=peIZZaNFmrguJH0KRz/doj1beokQ/ofIs926O/xougD3SanZR3UZWsQ+q91LerbGP+ 2OrncQjwu7Fss5mFCmWkKB60WZGs8KEXeWzPrHCJt4mVUdLiZyQDULd3go8pcLIVmiEI +8YbJcj7fHod+cTe4nqc4bKw5NiWLxM0q8BSnBAZyfqMX4OZCoidQ+0BYB3bjQ8h8ZMJ aFIFjW5krZ3+SSDloxh/WrUwd0NcB/r3b6nsfxRaG50Zx7kZ5XOnHUfP15VUA9NxcqAv W0wug4DiE3v1jVesQoAhivQANAs5wOgEI4gfJ6tiP7rXo8Jw8a1U1pWNZ6zwkikEIY4R B+NQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=0nRK4EfOPjSxCiNEuVggQvBD1uscs6VXmH9zNgJfCZc=; b=kgqbIiZ4nCtdnbuzwIzJawBy+gnq0sWANt8ahpnShKGKLHB6uKeJMpMLB+m+GAgvyX bl5r3R/46tl0hwQconz1zIljklTfRnTHhgxfLcIAMuCphGD8TFtvIN+QTZtY4GY7sNay b8gIKMpoR2JZ/9wwyo5xIG7B6WPhDs1/qYFdiAuuk3eNztK0uXViaj3k2xBAV6IvAhSx BKtzaQSvO8Q1uxewj1Dh9R5OBNDDyATCmIOh4930HtEnBnPgYfbO/YEaGyDvqQAlCzNZ pI5S24UyPmLGutmUuxd2NaEjAU/+NkxBfA5769uHNLWOqh7sWT1cnoGVb8+XA2r4GWMr lasg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x7-20020a17090ab00700b00258c1cef517si6243982pjq.135.2023.06.05.00.03.22; Mon, 05 Jun 2023 00:03:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230329AbjFEHCP (ORCPT + 99 others); Mon, 5 Jun 2023 03:02:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35122 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230212AbjFEHBs (ORCPT ); Mon, 5 Jun 2023 03:01:48 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C5585110; Mon, 5 Jun 2023 00:01:44 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0DAAAD75; Mon, 5 Jun 2023 00:02:30 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6EEF23F793; Mon, 5 Jun 2023 00:01:42 -0700 (PDT) From: Mark Rutland To: linux-kernel@vger.kernel.org Cc: akiyks@gmail.com, boqun.feng@gmail.com, corbet@lwn.net, keescook@chromium.org, linux@armlinux.org.uk, linux-doc@vger.kernel.org, mark.rutland@arm.com, mchehab@kernel.org, paulmck@kernel.org, peterz@infradead.org, rdunlap@infradead.org, sstabellini@kernel.org, will@kernel.org Subject: [PATCH v2 05/27] locking/atomic: arc: add preprocessor symbols Date: Mon, 5 Jun 2023 08:01:02 +0100 Message-Id: <20230605070124.3741859-6-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230605070124.3741859-1-mark.rutland@arm.com> References: <20230605070124.3741859-1-mark.rutland@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767845255879334353?= X-GMAIL-MSGID: =?utf-8?q?1767845255879334353?= Some atomics can be implemented in several different ways, e.g. FULL/ACQUIRE/RELEASE ordered atomics can be implemented in terms of RELAXED atomics, and ACQUIRE/RELEASE/RELAXED can be implemented in terms of FULL ordered atomics. Other atomics are optional, and don't exist in some configurations (e.g. not all architectures implement the 128-bit cmpxchg ops). Subsequent patches will require that architectures define a preprocessor symbol for any atomic (or ordering variant) which is optional. This will make the fallback ifdeffery more robust, and simplify future changes. Add the required definitions to arch/arc. Signed-off-by: Mark Rutland Reviewed-by: Kees Cook Cc: Boqun Feng Cc: Paul E. McKenney Cc: Peter Zijlstra Cc: Will Deacon --- arch/arc/include/asm/atomic-spinlock.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arc/include/asm/atomic-spinlock.h b/arch/arc/include/asm/atomic-spinlock.h index 2c830347bfb4e..89d12a60f84c0 100644 --- a/arch/arc/include/asm/atomic-spinlock.h +++ b/arch/arc/include/asm/atomic-spinlock.h @@ -81,6 +81,11 @@ static inline int arch_atomic_fetch_##op(int i, atomic_t *v) \ ATOMIC_OPS(add, +=, add) ATOMIC_OPS(sub, -=, sub) +#define arch_atomic_fetch_add arch_atomic_fetch_add +#define arch_atomic_fetch_sub arch_atomic_fetch_sub +#define arch_atomic_add_return arch_atomic_add_return +#define arch_atomic_sub_return arch_atomic_sub_return + #undef ATOMIC_OPS #define ATOMIC_OPS(op, c_op, asm_op) \ ATOMIC_OP(op, c_op, asm_op) \ @@ -92,7 +97,11 @@ ATOMIC_OPS(or, |=, or) ATOMIC_OPS(xor, ^=, xor) #define arch_atomic_andnot arch_atomic_andnot + +#define arch_atomic_fetch_and arch_atomic_fetch_and #define arch_atomic_fetch_andnot arch_atomic_fetch_andnot +#define arch_atomic_fetch_or arch_atomic_fetch_or +#define arch_atomic_fetch_xor arch_atomic_fetch_xor #undef ATOMIC_OPS #undef ATOMIC_FETCH_OP