Message ID | 20230603200243.243878-10-varshini.rajendran@microchip.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h11-20020a65480b000000b0051b1241624esi3172161pgs.65.2023.06.03.13.08.09; Sat, 03 Jun 2023 13:08:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=nJPlPocb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230123AbjFCUFU (ORCPT <rfc822;stefanalexe802@gmail.com> + 99 others); Sat, 3 Jun 2023 16:05:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48628 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230024AbjFCUFS (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Sat, 3 Jun 2023 16:05:18 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 026571BD; Sat, 3 Jun 2023 13:05:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1685822705; x=1717358705; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=j328QsBu4eVTOOKjQLsaJ9CBGwldAnFNwooMafcZCZE=; b=nJPlPocbtfUpZrB7nwDBJr+IsxJXf8TVEKs8Xmccud0rKeIfnWM3V5VE gKVCG7XK+n93tp5H+TjdHwuUmnnv+NZdN/ef9eP7qH2+lgk3lFWW31Uxb oRzf4xAKj07M9+B6dskKHFC0GHyxNy0piKUaRHU5t6CK1rfYHKDe9nYsJ naKatrxpwoVDwUBNl/zEwCwJPiuPghRrmg+EwARDJBWzCCVy5+V7Fcabb Npmykp7OXz0Wo6B0hJOiIvO+QYV602Ax2R/PlRIUt88uh/MWpH7t1wf6s Lrsb3a7U3VP+XDr9ml3xR91g/3ajocivfqcq8uM7XQCzi/s8TifApSGuv Q==; X-IronPort-AV: E=Sophos;i="6.00,216,1681196400"; d="scan'208";a="216104547" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Jun 2023 13:05:04 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Sat, 3 Jun 2023 13:05:04 -0700 Received: from che-lt-i67070.amer.actel.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Sat, 3 Jun 2023 13:04:52 -0700 From: Varshini Rajendran <varshini.rajendran@microchip.com> To: <tglx@linutronix.de>, <maz@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <claudiu.beznea@microchip.com>, <davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>, <gregkh@linuxfoundation.org>, <linux@armlinux.org.uk>, <mturquette@baylibre.com>, <sboyd@kernel.org>, <sre@kernel.org>, <broonie@kernel.org>, <varshini.rajendran@microchip.com>, <arnd@arndb.de>, <gregory.clement@bootlin.com>, <sudeep.holla@arm.com>, <balamanikandan.gunasundar@microchip.com>, <mihai.sain@microchip.com>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <netdev@vger.kernel.org>, <linux-usb@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-pm@vger.kernel.org> CC: <Hari.PrasathGE@microchip.com>, <cristian.birsan@microchip.com>, <durai.manickamkr@microchip.com>, <manikandan.m@microchip.com>, <dharma.b@microchip.com>, <nayabbasha.sayed@microchip.com>, <balakrishnan.s@microchip.com> Subject: [PATCH 09/21] ARM: at91: pm: add sam9x7 soc init config Date: Sun, 4 Jun 2023 01:32:31 +0530 Message-ID: <20230603200243.243878-10-varshini.rajendran@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230603200243.243878-1-varshini.rajendran@microchip.com> References: <20230603200243.243878-1-varshini.rajendran@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767713441931828937?= X-GMAIL-MSGID: =?utf-8?q?1767713441931828937?= |
Series |
Add support for sam9x7 SoC family
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Commit Message
Varshini Rajendran
June 3, 2023, 8:02 p.m. UTC
Add SoC init config for sam9x7 family
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
---
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/sam9x7.c | 34 ++++++++++++++++++++++++++++++++++
2 files changed, 35 insertions(+)
create mode 100644 arch/arm/mach-at91/sam9x7.c
Comments
On 03.06.2023 23:02, Varshini Rajendran wrote: > Add SoC init config for sam9x7 family > > Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> > --- > arch/arm/mach-at91/Makefile | 1 + > arch/arm/mach-at91/sam9x7.c | 34 ++++++++++++++++++++++++++++++++++ > 2 files changed, 35 insertions(+) > create mode 100644 arch/arm/mach-at91/sam9x7.c > > diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile > index 794bd12ab0a8..7d8a7bc44e65 100644 > --- a/arch/arm/mach-at91/Makefile > +++ b/arch/arm/mach-at91/Makefile > @@ -7,6 +7,7 @@ > obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o > obj-$(CONFIG_SOC_AT91SAM9) += at91sam9.o > obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o > +obj-$(CONFIG_SOC_SAM9X7) += sam9x7.o > obj-$(CONFIG_SOC_SAMA5) += sama5.o sam_secure.o > obj-$(CONFIG_SOC_SAMA7) += sama7.o > obj-$(CONFIG_SOC_SAMV7) += samv7.o > diff --git a/arch/arm/mach-at91/sam9x7.c b/arch/arm/mach-at91/sam9x7.c > new file mode 100644 > index 000000000000..e322c5a3cdb6 > --- /dev/null > +++ b/arch/arm/mach-at91/sam9x7.c > @@ -0,0 +1,34 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Setup code for SAM9X7. > + * > + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries 2023? > + * > + * Author: Varshini Rajendran <varshini.rajendran@microchip.com> > + */ > + > +#include <linux/of.h> > +#include <linux/of_platform.h> > + > +#include <asm/mach/arch.h> > +#include <asm/system_misc.h> > + > +#include "generic.h" > + > +static void __init sam9x7_init(void) > +{ > + of_platform_default_populate(NULL, NULL, NULL); > + > + sam9x7_pm_init(); > +} > + > +static const char *const sam9x7_dt_board_compat[] __initconst = { > + "microchip,sam9x7", > + NULL > +}; > + > +DT_MACHINE_START(sam9x7_dt, "Microchip SAM9X7") > + /* Maintainer: Microchip */ > + .init_machine = sam9x7_init, > + .dt_compat = sam9x7_dt_board_compat, > +MACHINE_END
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 794bd12ab0a8..7d8a7bc44e65 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o obj-$(CONFIG_SOC_AT91SAM9) += at91sam9.o obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o +obj-$(CONFIG_SOC_SAM9X7) += sam9x7.o obj-$(CONFIG_SOC_SAMA5) += sama5.o sam_secure.o obj-$(CONFIG_SOC_SAMA7) += sama7.o obj-$(CONFIG_SOC_SAMV7) += samv7.o diff --git a/arch/arm/mach-at91/sam9x7.c b/arch/arm/mach-at91/sam9x7.c new file mode 100644 index 000000000000..e322c5a3cdb6 --- /dev/null +++ b/arch/arm/mach-at91/sam9x7.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Setup code for SAM9X7. + * + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries + * + * Author: Varshini Rajendran <varshini.rajendran@microchip.com> + */ + +#include <linux/of.h> +#include <linux/of_platform.h> + +#include <asm/mach/arch.h> +#include <asm/system_misc.h> + +#include "generic.h" + +static void __init sam9x7_init(void) +{ + of_platform_default_populate(NULL, NULL, NULL); + + sam9x7_pm_init(); +} + +static const char *const sam9x7_dt_board_compat[] __initconst = { + "microchip,sam9x7", + NULL +}; + +DT_MACHINE_START(sam9x7_dt, "Microchip SAM9X7") + /* Maintainer: Microchip */ + .init_machine = sam9x7_init, + .dt_compat = sam9x7_dt_board_compat, +MACHINE_END