Message ID | 20230602182659.307876-3-detlev.casanova@collabora.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 73-20020a63004c000000b00542c0357ee7si265719pga.57.2023.06.02.11.30.08; Fri, 02 Jun 2023 11:30:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=WDs2E0+b; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236963AbjFBS1S (ORCPT <rfc822;limurcpp@gmail.com> + 99 others); Fri, 2 Jun 2023 14:27:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236683AbjFBS1P (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 2 Jun 2023 14:27:15 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64514197; Fri, 2 Jun 2023 11:27:14 -0700 (PDT) Received: from arisu.hitronhub.home (unknown [23.233.251.139]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: detlev) by madras.collabora.co.uk (Postfix) with ESMTPSA id A496E6606EDB; Fri, 2 Jun 2023 19:27:11 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1685730433; bh=REGo3CnEZr8k3Pj3f3Ta8sWqzV48U3ofkXaqmmNacG0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WDs2E0+bFDhWw3ZV2myS9tqjwM9WlcLQivKYCKidl34qu6k8NeF7Iwfg1+LEomvpG aBEJRh4aKGLEKk6lK5UlYr1HWmKhsZNkL5CAAHggpwx+LZVS7CSvL5mRX7wBuhQfvi eGJmim4+YaMYR7ve5IMHyeUAPvcFYA/bNRnCrNGZ98y0nEE2pKT1L02210ttPdGO4A 8hV7/2gtauAxPnP66F9hoqFmeWap7qq+3qWwbi8Tb3T0Z72quusuk2DpquvarXIBcZ UEOPUuHzx1+9QajLEmPSYDeHO0FIZPsPVmmU0yProAUBf+c1U4QewaLIcmZu1Ll7C9 BN+/TYuUwoNCA== From: Detlev Casanova <detlev.casanova@collabora.com> To: linux-kernel@vger.kernel.org Cc: Andrew Lunn <andrew@lunn.ch>, Heiner Kallweit <hkallweit1@gmail.com>, Russell King <linux@armlinux.org.uk>, "David S . Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Florian Fainelli <f.fainelli@gmail.com>, netdev@vger.kernel.org, devicetree@vger.kernel.org, Detlev Casanova <detlev.casanova@collabora.com> Subject: [PATCH v2 2/3] dt-bindings: net: phy: Document support for external PHY clk Date: Fri, 2 Jun 2023 14:26:58 -0400 Message-Id: <20230602182659.307876-3-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20230602182659.307876-1-detlev.casanova@collabora.com> References: <20230602182659.307876-1-detlev.casanova@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767616672374080595?= X-GMAIL-MSGID: =?utf-8?q?1767616672374080595?= |
Series |
[v2,1/3] net: phy: realtek: Add optional external PHY clock
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Commit Message
Detlev Casanova
June 2, 2023, 6:26 p.m. UTC
Ethern PHYs can have external an clock that needs to be activated before
probing the PHY.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
---
Documentation/devicetree/bindings/net/ethernet-phy.yaml | 6 ++++++
1 file changed, 6 insertions(+)
Comments
On Fri, Jun 02, 2023 at 02:26:58PM -0400, Detlev Casanova wrote: > Ethern PHYs can have external an clock that needs to be activated before > probing the PHY. `Ethernet PHYs can have an external clock.` We need to be careful with 'activated before probing the PHY'. phylib itself will not activate the clock. You must be putting the IDs into the compatible string, so the correct driver is loaded, and its probe function is called. The probe itself enables the clock, so it is not before probe, but during probe. I'm picky about this because we have issues with enumerating the MDIO bus to find PHYs. Some boards needs the PHY taking out of reset, regulators enabled, clocks enabled etc, before the PHY will respond on the bus. It is hard for the core to do this, before the probe. So we recommend putting IDs in the compatible, so the driver probe function to do any additional setup needed. > Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> > --- > Documentation/devicetree/bindings/net/ethernet-phy.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml > index 4f574532ee13..c1241c8a3b77 100644 > --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml > +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml > @@ -93,6 +93,12 @@ properties: > the turn around line low at end of the control phase of the > MDIO transaction. > > + clocks: > + maxItems: 1 > + description: > + External clock connected to the PHY. If not specified it is assumed > + that the PHY uses a fixed crystal or an internal oscillator. This text is good. Andrew --- pw-bot: cr
On Friday, June 2, 2023 2:42:38 P.M. EDT Andrew Lunn wrote: > On Fri, Jun 02, 2023 at 02:26:58PM -0400, Detlev Casanova wrote: > > Ethern PHYs can have external an clock that needs to be activated before > > probing the PHY. > > `Ethernet PHYs can have an external clock.` > > We need to be careful with 'activated before probing the PHY'. phylib > itself will not activate the clock. You must be putting the IDs into > the compatible string, so the correct driver is loaded, and its probe > function is called. The probe itself enables the clock, so it is not > before probe, but during probe. > > I'm picky about this because we have issues with enumerating the MDIO > bus to find PHYs. Some boards needs the PHY taking out of reset, > regulators enabled, clocks enabled etc, before the PHY will respond on > the bus. It is hard for the core to do this, before the probe. So we > recommend putting IDs in the compatible, so the driver probe function > to do any additional setup needed. That makes sense, In my head, "probing" == calling phy_write/read() functions. But I get how this could be confused with the _probe() function. (And I just realised that there are typos) What about "Ethernet PHYs can have an external clock that needs to be activated before communicating with the PHY" ? > > Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> > > --- > > > > Documentation/devicetree/bindings/net/ethernet-phy.yaml | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml > > b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index > > 4f574532ee13..c1241c8a3b77 100644 > > --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml > > +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml > > > > @@ -93,6 +93,12 @@ properties: > > the turn around line low at end of the control phase of the > > MDIO transaction. > > > > + clocks: > > + maxItems: 1 > > + description: > > + External clock connected to the PHY. If not specified it is assumed > > + that the PHY uses a fixed crystal or an internal oscillator. > > This text is good. Detlev
> What about "Ethernet PHYs can have an external clock that needs to be > activated before communicating with the PHY" ? That good. Thanks Andrew
On 02/06/2023 20:26, Detlev Casanova wrote: > Ethern PHYs can have external an clock that needs to be activated before > probing the PHY. > > Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> > --- > Documentation/devicetree/bindings/net/ethernet-phy.yaml | 6 ++++++ With fixes from Andrew: Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 4f574532ee13..c1241c8a3b77 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -93,6 +93,12 @@ properties: the turn around line low at end of the control phase of the MDIO transaction. + clocks: + maxItems: 1 + description: + External clock connected to the PHY. If not specified it is assumed + that the PHY uses a fixed crystal or an internal oscillator. + enet-phy-lane-swap: $ref: /schemas/types.yaml#/definitions/flag description: