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Thu, 01 Jun 2023 06:58:14 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3516w9Ce022046; Thu, 1 Jun 2023 06:58:10 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3quaxm7e8c-1; Thu, 01 Jun 2023 06:58:10 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3516wALF022057; Thu, 1 Jun 2023 06:58:10 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-kbajaj-hyd.qualcomm.com [10.147.247.189]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3516wAus022055; Thu, 01 Jun 2023 06:58:10 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 2340697) id 44344529756; Thu, 1 Jun 2023 12:28:09 +0530 (+0530) From: Komal Bajaj To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio , Bhupesh Sharma Cc: Komal Bajaj , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v4 2/4] arm64: dts: qcom: qdu1000: Add SDHCI node Date: Thu, 1 Jun 2023 12:28:03 +0530 Message-Id: <20230601065805.18079-3-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230601065805.18079-1-quic_kbajaj@quicinc.com> References: <20230601065805.18079-1-quic_kbajaj@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Xx1A3YHHR16vrl8xVrid827ypMlUialU X-Proofpoint-ORIG-GUID: Xx1A3YHHR16vrl8xVrid827ypMlUialU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-01_04,2023-05-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 spamscore=0 priorityscore=1501 mlxlogscore=922 adultscore=0 mlxscore=0 impostorscore=0 phishscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2306010061 X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767483305189672533?= X-GMAIL-MSGID: =?utf-8?q?1767483305189672533?= Add sdhc node for eMMC on QDU1000 and QRU1000 SoCs. Signed-off-by: Komal Bajaj Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 47 +++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index 734438113bba..6df07334f1d3 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -842,6 +842,53 @@ #hwlock-cells = <1>; }; + sdhc: mmc@8804000 { + compatible = "qcom,qdu1000-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x0 0x08804000 0x0 0x1000>, + <0x0 0x08805000 0x0 0x1000>; + reg-names = "hc", "cqhci"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC5_AHB_CLK>, + <&gcc GCC_SDCC5_APPS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", + "core", + "xo"; + + resets = <&gcc GCC_SDCC5_BCR>; + + interconnects = <&system_noc MASTER_SDCC_1 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &system_noc SLAVE_SDCC_2 0>; + interconnect-names = "sdhc-ddr", "cpu-sdhc"; + power-domains = <&rpmhpd QDU1000_CX>; + operating-points-v2 = <&sdhc1_opp_table>; + + iommus = <&apps_smmu 0x80 0x0>; + dma-coherent; + + bus-width = <8>; + + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; + + status = "disabled"; + + sdhc1_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + required-opps = <&rpmhpd_opp_nom>; + opp-peak-kBps = <6528000 1652800>; + opp-avg-kBps = <400000 0>; + }; + }; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,qdu1000-pdc", "qcom,pdc"; reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;