Message ID | 20230531031001.7440-1-shuijing.li@mediatek.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id x20-20020a17090aca1400b002567ea157e6si176110pjt.136.2023.05.30.20.18.27; Tue, 30 May 2023 20:19:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=CBUHuG6v; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233991AbjEaDJ4 (ORCPT <rfc822;callmefire3@gmail.com> + 99 others); Tue, 30 May 2023 23:09:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231407AbjEaDJu (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Tue, 30 May 2023 23:09:50 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5567211D; Tue, 30 May 2023 20:09:42 -0700 (PDT) X-UUID: 937d9f5aff6011ed9cb5633481061a41-20230531 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=i+8nMDyCUgtl3WLgCsYivUYfh194g8U9gITbrqABQrw=; b=CBUHuG6vgK2XOuk4r0+BVMmcmrW2FviYTw++N7TLu+KifPuyIFEen7kC535V1eL35EWecL/U8RWPC+GNNuOPKJkyT5Lkf7iNVMCU7J9uUy1WeEwzfd874sYUrlu3CdXDhzX/gOj8BPS+EW+sqZ21rnxoWCx41LTF5cvLrPfCV3I=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.25,REQID:b03f65da-9970-429d-afd1-900f4fae9d44,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.25,REQID:b03f65da-9970-429d-afd1-900f4fae9d44,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:d5b0ae3,CLOUDID:3f4fe13c-de1e-4348-bc35-c96f92f1dcbb,B ulkID:230531110938JUYPPQMA,BulkQuantity:0,Recheck:0,SF:28|17|19|48|38|29,T C:nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,CO L:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-UUID: 937d9f5aff6011ed9cb5633481061a41-20230531 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from <shuijing.li@mediatek.com>) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1874157115; Wed, 31 May 2023 11:09:37 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 31 May 2023 11:09:36 +0800 Received: from mszsdhlt06.gcn.mediatek.inc (10.16.6.206) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 31 May 2023 11:09:35 +0800 From: Shuijing Li <shuijing.li@mediatek.com> To: <thierry.reding@gmail.com>, <u.kleine-koenig@pengutronix.de>, <matthias.bgg@gmail.com>, <angelogioacchino.delregno@collabora.com> CC: <devicetree@vger.kernel.org>, <linux-pwm@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <Project_Global_Chrome_Upstream_Group@mediatek.com>, <jitao.shi@mediatek.com>, Shuijing Li <shuijing.li@mediatek.com>, Fei Shao <fshao@chromium.org> Subject: [PATCH v3] pwm: mtk_disp: Fix the disable flow of disp_pwm Date: Wed, 31 May 2023 11:10:01 +0800 Message-ID: <20230531031001.7440-1-shuijing.li@mediatek.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAY_BE_FORGED,SPF_HELO_PASS,T_SCC_BODY_TEXT_LINE, T_SPF_TEMPERROR,UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767378145599130517?= X-GMAIL-MSGID: =?utf-8?q?1767378145599130517?= |
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[v3] pwm: mtk_disp: Fix the disable flow of disp_pwm
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Commit Message
Shuijing Li
May 31, 2023, 3:10 a.m. UTC
There is a flow error in the original mtk_disp_pwm_apply() function. If this function is called when the clock is disabled, there will be a chance to operate the disp_pwm register, resulting in disp_pwm exception. Fix this accordingly. Fixes: 888a623db5d0 ("pwm: mtk-disp: Implement atomic API .apply()") Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Tested-by: Fei Shao <fshao@chromium.org> --- Changes in v3: Add Fixes per suggestion from the previous thread: https://lore.kernel.org/lkml/CAC=S1nhVrbaAh2u7rG-=-RubsxTZvMBRZO-t0NA8jG7M8187EA@mail.gmail.com/ Changes in v2: Use if (A && B) { something(); } instead of if (A) { if (B) { something(); } } per suggestion from the previous thread: https://lore.kernel.org/lkml/20230515140346.bxeu6xewi6a446nd@pengutronix.de/ --- drivers/pwm/pwm-mtk-disp.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-)
Comments
Il 31/05/23 05:10, Shuijing Li ha scritto: > There is a flow error in the original mtk_disp_pwm_apply() function. > If this function is called when the clock is disabled, there will be a > chance to operate the disp_pwm register, resulting in disp_pwm exception. > Fix this accordingly. > > Fixes: 888a623db5d0 ("pwm: mtk-disp: Implement atomic API .apply()") > Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> > Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > Tested-by: Fei Shao <fshao@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
On 31/05/2023 05:10, Shuijing Li wrote: > There is a flow error in the original mtk_disp_pwm_apply() function. > If this function is called when the clock is disabled, there will be a > chance to operate the disp_pwm register, resulting in disp_pwm exception. > Fix this accordingly. Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
On Wed, May 31, 2023 at 11:10:01AM +0800, Shuijing Li wrote: > There is a flow error in the original mtk_disp_pwm_apply() function. > If this function is called when the clock is disabled, there will be a > chance to operate the disp_pwm register, resulting in disp_pwm exception. > Fix this accordingly. > > Fixes: 888a623db5d0 ("pwm: mtk-disp: Implement atomic API .apply()") > Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> > Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > Tested-by: Fei Shao <fshao@chromium.org> When I sent my ack for v2, I missed there was already a v3, so here again for the sake of easier maintenance: Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> > --- > Changes in v3: > Add Fixes per suggestion from the previous thread: Note that for that a new version isn't necessary, patchwork (and I think also b4) pick up a fixes line from replies. Best regards Uwe
On Wed, 31 May 2023 11:10:01 +0800, Shuijing Li wrote: > There is a flow error in the original mtk_disp_pwm_apply() function. > If this function is called when the clock is disabled, there will be a > chance to operate the disp_pwm register, resulting in disp_pwm exception. > Fix this accordingly. > > Applied, thanks! [1/1] pwm: mtk_disp: Fix the disable flow of disp_pwm commit: bc13d60e4e1e945b34769a4a4c2b172e8552abe5 Best regards,
diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c index 79e321e96f56..2401b6733241 100644 --- a/drivers/pwm/pwm-mtk-disp.c +++ b/drivers/pwm/pwm-mtk-disp.c @@ -79,14 +79,11 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (state->polarity != PWM_POLARITY_NORMAL) return -EINVAL; - if (!state->enabled) { - mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, mdp->data->enable_mask, - 0x0); - - if (mdp->enabled) { - clk_disable_unprepare(mdp->clk_mm); - clk_disable_unprepare(mdp->clk_main); - } + if (!state->enabled && mdp->enabled) { + mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, + mdp->data->enable_mask, 0x0); + clk_disable_unprepare(mdp->clk_mm); + clk_disable_unprepare(mdp->clk_main); mdp->enabled = false; return 0;