Message ID | 20230531-topic-8998_mmssclk-v3-5-ba1b1fd9ee75@linaro.org |
---|---|
State | New |
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[83.9.2.185]) by smtp.gmail.com with ESMTPSA id o3-20020a2e9b43000000b002b9ed203af1sm2863218ljj.132.2023.08.09.12.20.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Aug 2023 12:20:45 -0700 (PDT) From: Konrad Dybcio <konrad.dybcio@linaro.org> Date: Wed, 09 Aug 2023 21:20:28 +0200 Subject: [PATCH v3 5/6] clk: qcom: mmcc-msm8998: Fix the SMMU GDSC MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230531-topic-8998_mmssclk-v3-5-ba1b1fd9ee75@linaro.org> References: <20230531-topic-8998_mmssclk-v3-0-ba1b1fd9ee75@linaro.org> In-Reply-To: <20230531-topic-8998_mmssclk-v3-0-ba1b1fd9ee75@linaro.org> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Jeffrey Hugo <jeffrey.l.hugo@gmail.com>, Imran Khan <kimran@codeaurora.org>, Rajendra Nayak <quic_rjendra@quicinc.com>, Joonwoo Park <joonwoop@codeaurora.org>, Jeffrey Hugo <quic_jhugo@quicinc.com>, Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>, Joerg Roedel <joro@8bytes.org>, Jeffrey Hugo <quic_jhugo@quicinc.com> Cc: Marijn Suijten <marijn.suijten@somainline.org>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Jami Kettunen <jami.kettunen@somainline.org>, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Konrad Dybcio <konrad.dybcio@linaro.org> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1691608824; l=1105; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=87zmBNCrKExC5fA2pDw1hJreUEORhjqL4+NYXqa3bgY=; b=CtWmrvSHsvlErbsQsxLrU3ODuhQtNsTsNtB19xrNUGWfiV2aSZHRHHqxrLMUFEu1uiAStAAWj RMlV9Kb8TVNBKbiitjQkSgCh91rmQV5dVmkhomop/HO4nk1+OC6BFNa X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773786047015442121 X-GMAIL-MSGID: 1773786047015442121 |
Series |
MMCC MSM8998 fixes
|
|
Commit Message
Konrad Dybcio
Aug. 9, 2023, 7:20 p.m. UTC
The SMMU GDSC doesn't have to be ALWAYS-ON and shouldn't feature the
HW_CTRL flag (it's separate from hw_ctrl_addr). In addition to that,
it should feature a cxc entry for bimc_smmu_axi_clk and be marked as
votable.
Fix all of these issues.
Fixes: d14b15b5931c ("clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
drivers/clk/qcom/mmcc-msm8998.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Comments
On 8/9/2023 1:20 PM, Konrad Dybcio wrote: > The SMMU GDSC doesn't have to be ALWAYS-ON and shouldn't feature the > HW_CTRL flag (it's separate from hw_ctrl_addr). In addition to that, > it should feature a cxc entry for bimc_smmu_axi_clk and be marked as > votable. I appear to have confused HW_CTRL with hw_ctrl_addr. Thanks for fixing that. I recall I made it always-on for display handoff. The bootloader on the laptops will enable the display, which means the MDP is active and using the SMMU. The SMMU is powered by the GDSC as you know. The MDP is going to be polling a framebuffer in DDR, which EFI services (efifb) is going to be updating. All of this is active during linux boot, which is how the kernel bootlog gets printed on screen. If I remember right, the GDSC will be registered. When it is done probing, there will be no consumers. So the Linux framework will step in and turn it off before the consumers come up. This kills power to the SMMU. If the SMMU doesn't come back on before the MDP polls DDR again, you get a bus hang and a crash. I assumed that any msm8998 device would be using the MDP/GPU and thus the SMMU would pretty much always be powered on. I expected this patch to break the laptop. It does not in my testing. However, I see that I disabled the MMCC node in DT with a todo about the display. So the GDSC is never registered, and then never gets turned off. I believe that todo is pending some updates I need to make to the TI DSI/eDP bridge because the I2C port on the bridge is not wired up. I should really dust that off and complete it. Regardless, even with the todo addressed, I think removing always-on will still break the laptops unless the bootloader handoff of display was solved and I missed it. I get that for your usecase, a phone where the bootloader does not init the display, always-on has the potential to burn extra power. I'm not sure how to make both of us happy through. Do you have any suggestions? > > Fix all of these issues. > > Fixes: d14b15b5931c ("clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver") > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > drivers/clk/qcom/mmcc-msm8998.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/qcom/mmcc-msm8998.c b/drivers/clk/qcom/mmcc-msm8998.c > index d0a5440e2291..4fdc41e7d2a8 100644 > --- a/drivers/clk/qcom/mmcc-msm8998.c > +++ b/drivers/clk/qcom/mmcc-msm8998.c > @@ -2627,11 +2627,13 @@ static struct gdsc camss_cpp_gdsc = { > static struct gdsc bimc_smmu_gdsc = { > .gdscr = 0xe020, > .gds_hw_ctrl = 0xe024, > + .cxcs = (unsigned int []){ 0xe008 }, > + .cxc_count = 1, > .pd = { > .name = "bimc_smmu", > }, > .pwrsts = PWRSTS_OFF_ON, > - .flags = HW_CTRL | ALWAYS_ON, > + .flags = VOTABLE, > }; > > static struct clk_regmap *mmcc_msm8998_clocks[] = { >
On 10.08.2023 20:20, Jeffrey Hugo wrote: > On 8/9/2023 1:20 PM, Konrad Dybcio wrote: >> The SMMU GDSC doesn't have to be ALWAYS-ON and shouldn't feature the >> HW_CTRL flag (it's separate from hw_ctrl_addr). In addition to that, >> it should feature a cxc entry for bimc_smmu_axi_clk and be marked as >> votable. > > I appear to have confused HW_CTRL with hw_ctrl_addr. Thanks for fixing that. > > I recall I made it always-on for display handoff. The bootloader on the laptops will enable the display, which means the MDP is active and using the SMMU. The SMMU is powered by the GDSC as you know. The MDP is going to be polling a framebuffer in DDR, which EFI services (efifb) is going to be updating. All of this is active during linux boot, which is how the kernel bootlog gets printed on screen. This is essentially a missing / mis-configuration from the linux/dt POV and I think the consensus for using display without describing it properly with mdss has been to do one of: - adding a simple-framebuffer node with all the necessary clocks/pds - adding "clk_ignore_unused pd_ignore_unused" to your cmdline > > If I remember right, the GDSC will be registered. When it is done probing, there will be no consumers. So the Linux framework will step in and turn it off before the consumers come up. This kills power to the SMMU. If the SMMU doesn't come back on before the MDP polls DDR again, you get a bus hang and a crash. Yep > I assumed that any msm8998 device would be using the MDP/GPU and thus the SMMU would pretty much always be powered on. This flag however bans putting it to sleep when not in use. > > I expected this patch to break the laptop. It does not in my testing. However, I see that I disabled the MMCC node in DT with a todo about the display. So the GDSC is never registered, and then never gets turned off. I believe that todo is pending some updates I need to make to the TI DSI/eDP bridge because the I2C port on the bridge is not wired up. I should really dust that off and complete it. Right, so what you have now is a third, untold "solution" to the problem described above.. not really a supported configuration as it's not "correct" I'd happily see you wire up the bridge et al though! > Regardless, even with the todo addressed, I think removing always-on will still break the laptops unless the bootloader handoff of display was solved and I missed it. > > I get that for your usecase, a phone where the bootloader does not init the display, always-on has the potential to burn extra power. I'm not sure how to make both of us happy through. > > Do you have any suggestions? Hope my replies above are enough. Konrad
On 8/10/2023 12:46 PM, Konrad Dybcio wrote: > On 10.08.2023 20:20, Jeffrey Hugo wrote: >> On 8/9/2023 1:20 PM, Konrad Dybcio wrote: >>> The SMMU GDSC doesn't have to be ALWAYS-ON and shouldn't feature the >>> HW_CTRL flag (it's separate from hw_ctrl_addr). In addition to that, >>> it should feature a cxc entry for bimc_smmu_axi_clk and be marked as >>> votable. >> >> I appear to have confused HW_CTRL with hw_ctrl_addr. Thanks for fixing that. >> >> I recall I made it always-on for display handoff. The bootloader on the laptops will enable the display, which means the MDP is active and using the SMMU. The SMMU is powered by the GDSC as you know. The MDP is going to be polling a framebuffer in DDR, which EFI services (efifb) is going to be updating. All of this is active during linux boot, which is how the kernel bootlog gets printed on screen. > This is essentially a missing / mis-configuration from the linux/dt POV and > I think the consensus for using display without describing it properly with > mdss has been to do one of: > > - adding a simple-framebuffer node with all the necessary clocks/pds > - adding "clk_ignore_unused pd_ignore_unused" to your cmdline > >> >> If I remember right, the GDSC will be registered. When it is done probing, there will be no consumers. So the Linux framework will step in and turn it off before the consumers come up. This kills power to the SMMU. If the SMMU doesn't come back on before the MDP polls DDR again, you get a bus hang and a crash. > Yep > >> I assumed that any msm8998 device would be using the MDP/GPU and thus the SMMU would pretty much always be powered on. > This flag however bans putting it to sleep when not in use. > >> >> I expected this patch to break the laptop. It does not in my testing. However, I see that I disabled the MMCC node in DT with a todo about the display. So the GDSC is never registered, and then never gets turned off. I believe that todo is pending some updates I need to make to the TI DSI/eDP bridge because the I2C port on the bridge is not wired up. I should really dust that off and complete it. > Right, so what you have now is a third, untold "solution" to the problem > described above.. not really a supported configuration as it's not "correct" > > I'd happily see you wire up the bridge et al though! > > >> Regardless, even with the todo addressed, I think removing always-on will still break the laptops unless the bootloader handoff of display was solved and I missed it. >> >> I get that for your usecase, a phone where the bootloader does not init the display, always-on has the potential to burn extra power. I'm not sure how to make both of us happy through. >> >> Do you have any suggestions? > Hope my replies above are enough. I still think there is an issue, but my setup is not as complete as your on mainline. I'll clean things up and we'll solve the issues when we get to them. Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
diff --git a/drivers/clk/qcom/mmcc-msm8998.c b/drivers/clk/qcom/mmcc-msm8998.c index d0a5440e2291..4fdc41e7d2a8 100644 --- a/drivers/clk/qcom/mmcc-msm8998.c +++ b/drivers/clk/qcom/mmcc-msm8998.c @@ -2627,11 +2627,13 @@ static struct gdsc camss_cpp_gdsc = { static struct gdsc bimc_smmu_gdsc = { .gdscr = 0xe020, .gds_hw_ctrl = 0xe024, + .cxcs = (unsigned int []){ 0xe008 }, + .cxc_count = 1, .pd = { .name = "bimc_smmu", }, .pwrsts = PWRSTS_OFF_ON, - .flags = HW_CTRL | ALWAYS_ON, + .flags = VOTABLE, }; static struct clk_regmap *mmcc_msm8998_clocks[] = {