[stable,6.3,4/4] cacheinfo: Allow early level detection when DT/ACPI info is missing/broken
Message ID | 20230530224914.1251409-5-florian.fainelli@broadcom.com |
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State | New |
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Wysocki" <rafael@kernel.org>, Akihiko Odaki <akihiko.odaki@daynix.com>, Palmer Dabbelt <palmer@rivosinc.com>, Gavin Shan <gshan@redhat.com>, Jeremy Linton <jeremy.linton@arm.com>, linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-kernel@vger.kernel.org (open list) Subject: [PATCH stable 6.3 4/4] cacheinfo: Allow early level detection when DT/ACPI info is missing/broken Date: Tue, 30 May 2023 15:49:14 -0700 Message-Id: <20230530224914.1251409-5-florian.fainelli@broadcom.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230530224914.1251409-1-florian.fainelli@broadcom.com> References: <20230530224914.1251409-1-florian.fainelli@broadcom.com> MIME-Version: 1.0 Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="0000000000008fa07d05fcf10ff4" X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767361495763290751?= X-GMAIL-MSGID: =?utf-8?q?1767361495763290751?= |
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Missing cacheinfo backports
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Commit Message
Florian Fainelli
May 30, 2023, 10:49 p.m. UTC
From: Radu Rendec <rrendec@redhat.com> commit e103d55465db06c5344201fd5fa11bb19bc479c5 upstream Recent work enables cacheinfo memory for secondary CPUs to be allocated early, while still running on the primary CPU. That allows cacheinfo memory to be allocated safely on RT kernels. To make that work, the number of cache levels/leaves must be defined in the device tree or ACPI tables. Further work adds a path for early detection of the number of cache levels/leaves, which makes it possible to allocate the cacheinfo memory early without requiring extra DT/ACPI information. This patch addresses a specific issue with ACPI systems with no PPTT. In that case, parse_acpi_topology() returns an error code, which in turn makes init_cpu_topology() return early, before fetch_cache_info() is called. In that case, the early cache level detection doesn't run. The solution is to simply remove the "return" statement and let the code flow fall through to calling fetch_cache_info(). Signed-off-by: Radu Rendec <rrendec@redhat.com> Reported-by: Pierre Gondois <pierre.gondois@arm.com> Link: https://lore.kernel.org/all/dea94484-797f-3034-7b86-6d88801c0d91@arm.com/ Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Link: https://lore.kernel.org/r/20230412185759.755408-4-rrendec@redhat.com Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com> --- drivers/base/arch_topology.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c index c4b6198d7461..b741b5ba82bd 100644 --- a/drivers/base/arch_topology.c +++ b/drivers/base/arch_topology.c @@ -835,10 +835,10 @@ void __init init_cpu_topology(void) if (ret) { /* * Discard anything that was parsed if we hit an error so we - * don't use partial information. + * don't use partial information. But do not return yet to give + * arch-specific early cache level detection a chance to run. */ reset_cpu_topology(); - return; } for_each_possible_cpu(cpu) {