Message ID | 20230530114247.21821-5-alexander.shishkin@linux.intel.com |
---|---|
State | New |
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([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 30 May 2023 04:43:05 -0700 From: Alexander Shishkin <alexander.shishkin@linux.intel.com> To: linux-kernel@vger.kernel.org, x86@kernel.org, Andy Lutomirski <luto@kernel.org>, Dave Hansen <dave.hansen@linux.intel.com>, Ravi Shankar <ravi.v.shankar@intel.com>, Tony Luck <tony.luck@intel.com>, Sohil Mehta <sohil.mehta@intel.com>, Paul Lai <paul.c.lai@intel.com> Subject: [PATCH v2 04/12] x86/cpu: Enable LASS during CPU initialization Date: Tue, 30 May 2023 14:42:39 +0300 Message-Id: <20230530114247.21821-5-alexander.shishkin@linux.intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230530114247.21821-1-alexander.shishkin@linux.intel.com> References: <20230530114247.21821-1-alexander.shishkin@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767319607464977352?= X-GMAIL-MSGID: =?utf-8?q?1767319607464977352?= |
Series |
Enable Linear Address Space Separation support
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Commit Message
Alexander Shishkin
May 30, 2023, 11:42 a.m. UTC
From: Sohil Mehta <sohil.mehta@intel.com> Being a security feature, enable LASS by default if the platform supports it. Signed-off-by: Sohil Mehta <sohil.mehta@intel.com> --- arch/x86/kernel/cpu/common.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 80710a68ef7d..315cc67ba93a 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -413,6 +413,12 @@ static __always_inline void setup_umip(struct cpuinfo_x86 *c) cr4_clear_bits(X86_CR4_UMIP); } +static __always_inline void setup_lass(struct cpuinfo_x86 *c) +{ + if (cpu_feature_enabled(X86_FEATURE_LASS)) + cr4_set_bits(X86_CR4_LASS); +} + /* These bits should not change their value after CPU init is finished. */ static const unsigned long cr4_pinned_mask = X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP | @@ -1859,6 +1865,7 @@ static void identify_cpu(struct cpuinfo_x86 *c) setup_smep(c); setup_smap(c); setup_umip(c); + setup_lass(c); /* Enable FSGSBASE instructions if available. */ if (cpu_has(c, X86_FEATURE_FSGSBASE)) {