From patchwork Mon May 29 17:24:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sui Jingfeng X-Patchwork-Id: 100378 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:994d:0:b0:3d9:f83d:47d9 with SMTP id k13csp1679061vqr; Mon, 29 May 2023 10:46:28 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5fHh0Vsmag/GA0i1muvwvNr3IRIKDaEbGf431hVcfJV0hXgGAsU5N7cLWjacHDuJSLE/g5 X-Received: by 2002:a17:902:e810:b0:1b0:53dc:1f72 with SMTP id u16-20020a170902e81000b001b053dc1f72mr838534plg.58.1685382388542; Mon, 29 May 2023 10:46:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1685382388; cv=none; d=google.com; s=arc-20160816; b=nQI8LCuvNmuNgPQQtg9CCiBRKSkmJdhRmXvydZ4yAy2PYd7sqADKRqTf3q2plWChXo gKBDX1h88G0CGeh73JZkrTSNBvorkMZzdqy5bjnTnDSY76CpyXQRYzVt4BVl3cpvpu9+ biM/RWiH9Nm2+sNdcRNukxa57ovjyGR/6/KKas18vAaFfqBiryUvIFfmC9OVN4VmabUY FbMSsJQA2br5r8VLkRpNQ7TKN1ymsxL3Ze2O3UYfCp9jKvUIV9KoPdmJwPsEDBdvkKeZ tWcQeADIQI53yjgSeSDNPeagvnDNQ8BlUAHYyRWqj4V16Q0h9+v7Po0jSTbCmFBYIHDH Aj5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=fepsGobuFg9aHpZsZqWq6X1c1R5Y3wG5ilGfUYb2rT8=; b=NpZjoflNu0d81kHTYe3OusJo8h857CeqJR/4OW5pGou+qk0ivSf9LaULs0fi2ti6yJ EnTn8Dok/7/3ynaQ8NU9445IqtN599oLvaLAfev7n8CEMLxRuypaPxyAsINRlw8UXdLU C4+NMV7F9acdGwY3xS8uzeIGcfDSa6urNyriOL1TMOIofZ//mt5F+LJnCjLF5/4O+rJ0 SbTSn3RbzCD9QM4jlTTtxgJGAF2BI/rtQos4Iu6nf/K6zads6SVYnbVHvLURgMVpg0Da IrrGD8pU5aaM595O0DHTu5dDMOBD6LXA+3kYuXS13d6q03cdXEuPgJCluZL/5B2q0GnV jPhA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o18-20020a170902d4d200b001ae3214162dsi9840390plg.548.2023.05.29.10.45.55; Mon, 29 May 2023 10:46:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229657AbjE2RZQ (ORCPT + 99 others); Mon, 29 May 2023 13:25:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229582AbjE2RZB (ORCPT ); Mon, 29 May 2023 13:25:01 -0400 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 54E53C7 for ; Mon, 29 May 2023 10:24:54 -0700 (PDT) Received: from loongson.cn (unknown [10.20.42.43]) by gateway (Coremail) with SMTP id _____8Cx6fHl33RkLkoCAA--.5401S3; Tue, 30 May 2023 01:24:53 +0800 (CST) Received: from openarena.loongson.cn (unknown [10.20.42.43]) by localhost.localdomain (Coremail) with SMTP id AQAAf8CxMuXk33RkhkV_AA--.9919S4; Tue, 30 May 2023 01:24:53 +0800 (CST) From: Sui Jingfeng To: Lucas Stach , Russell King , Christian Gmeiner , David Airlie , Daniel Vetter Cc: linux-kernel@vger.kernel.org, etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, loongson-kernel@lists.loongnix.cn Subject: [PATCH v5 2/6] drm/etnaviv: add a dedicated function to get various clocks Date: Tue, 30 May 2023 01:24:48 +0800 Message-Id: <20230529172452.2148819-3-suijingfeng@loongson.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230529172452.2148819-1-suijingfeng@loongson.cn> References: <20230529172452.2148819-1-suijingfeng@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8CxMuXk33RkhkV_AA--.9919S4 X-CM-SenderInfo: xvxlyxpqjiv03j6o00pqjv00gofq/ X-Coremail-Antispam: 1Uk129KBjvJXoWxGw45JrWrAFW5Gr4rKw47XFb_yoWrGw1xpa 1fJa4Ykr1UZryjg347AFn8trnIkw1xCa4xC3s0vwnavw45JF4Ut3yYkFZ8XFs8ZryrWFWf Kr15Kr4UCFyF9rDanT9S1TB71UUUU1UqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU bSAYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_Jw0_Gr1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVW7JVWDJwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVWxJVW8Jr1l84 ACjcxK6I8E87Iv67AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4j6r4UJwAa w2AFwI0_Jw0_GFyle2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44 I27wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Wrv_ZF1lYx0Ex4A2 jsIE14v26F4j6r4UJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41lc7CjxV Aaw2AFwI0_Jw0_GFyl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1l4IxY O2xFxVAFwI0_JF0_Jw1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGV WUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_ Ar0_tr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26F4j6r4UJwCI42IY6xAIw20EY4v20xvaj4 0_Jr0_JF4lIxAIcVC2z280aVAFwI0_Cr0_Gr1UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_ Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07jrjjDUUUUU= X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767251523329345511?= X-GMAIL-MSGID: =?utf-8?q?1767251523329345511?= Because it is also platform-dependent, there are environments where don't have CLK subsystem support, for example, discreted PCI gpu. So don't rage quit if there is no CLK subsystem. For the GPU in LS7a1000 and LS2k2000, the working frequency of the GPU is tuned by configuring the PLL register directly. Signed-off-by: Sui Jingfeng --- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 62 ++++++++++++++++++--------- drivers/gpu/drm/etnaviv/etnaviv_gpu.h | 1 + 2 files changed, 42 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c index 636d3f39ddcb..4937580551a5 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -1565,10 +1565,45 @@ static irqreturn_t irq_handler(int irq, void *data) return ret; } +static int etnaviv_gpu_clk_get(struct etnaviv_gpu *gpu) +{ + struct device *dev = gpu->dev; + + if (gpu->no_clk) + return 0; + + gpu->clk_reg = devm_clk_get_optional(dev, "reg"); + DBG("clk_reg: %p", gpu->clk_reg); + if (IS_ERR(gpu->clk_reg)) + return PTR_ERR(gpu->clk_reg); + + gpu->clk_bus = devm_clk_get_optional(dev, "bus"); + DBG("clk_bus: %p", gpu->clk_bus); + if (IS_ERR(gpu->clk_bus)) + return PTR_ERR(gpu->clk_bus); + + gpu->clk_core = devm_clk_get(dev, "core"); + DBG("clk_core: %p", gpu->clk_core); + if (IS_ERR(gpu->clk_core)) + return PTR_ERR(gpu->clk_core); + gpu->base_rate_core = clk_get_rate(gpu->clk_core); + + gpu->clk_shader = devm_clk_get_optional(dev, "shader"); + DBG("clk_shader: %p", gpu->clk_shader); + if (IS_ERR(gpu->clk_shader)) + return PTR_ERR(gpu->clk_shader); + gpu->base_rate_shader = clk_get_rate(gpu->clk_shader); + + return 0; +} + static int etnaviv_gpu_clk_enable(struct etnaviv_gpu *gpu) { int ret; + if (gpu->no_clk) + return 0; + ret = clk_prepare_enable(gpu->clk_reg); if (ret) return ret; @@ -1599,6 +1634,9 @@ static int etnaviv_gpu_clk_enable(struct etnaviv_gpu *gpu) static int etnaviv_gpu_clk_disable(struct etnaviv_gpu *gpu) { + if (gpu->no_clk) + return 0; + clk_disable_unprepare(gpu->clk_shader); clk_disable_unprepare(gpu->clk_core); clk_disable_unprepare(gpu->clk_bus); @@ -1865,27 +1903,9 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev) return err; /* Get Clocks: */ - gpu->clk_reg = devm_clk_get_optional(&pdev->dev, "reg"); - DBG("clk_reg: %p", gpu->clk_reg); - if (IS_ERR(gpu->clk_reg)) - return PTR_ERR(gpu->clk_reg); - - gpu->clk_bus = devm_clk_get_optional(&pdev->dev, "bus"); - DBG("clk_bus: %p", gpu->clk_bus); - if (IS_ERR(gpu->clk_bus)) - return PTR_ERR(gpu->clk_bus); - - gpu->clk_core = devm_clk_get(&pdev->dev, "core"); - DBG("clk_core: %p", gpu->clk_core); - if (IS_ERR(gpu->clk_core)) - return PTR_ERR(gpu->clk_core); - gpu->base_rate_core = clk_get_rate(gpu->clk_core); - - gpu->clk_shader = devm_clk_get_optional(&pdev->dev, "shader"); - DBG("clk_shader: %p", gpu->clk_shader); - if (IS_ERR(gpu->clk_shader)) - return PTR_ERR(gpu->clk_shader); - gpu->base_rate_shader = clk_get_rate(gpu->clk_shader); + err = etnaviv_gpu_clk_get(gpu); + if (err) + return err; /* TODO: figure out max mapped size */ dev_set_drvdata(dev, gpu); diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h index 98c6f9c320fc..6da5209a7d64 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h @@ -148,6 +148,7 @@ struct etnaviv_gpu { struct clk *clk_reg; struct clk *clk_core; struct clk *clk_shader; + bool no_clk; unsigned int freq_scale; unsigned long base_rate_core;