diff mbox series

[v2,3/3] sh: dma: Correct the number of DMA channels in SH7709

Message ID 20230527164452.64797-4-contact@artur-rojek.eu
State New
Headers
Series SuperH DMAC fixes |

Commit Message

Artur Rojek May 27, 2023, 4:44 p.m. UTC 
  According to the hardware manual [1], the DMAC found in SH7709 features
only 4 channels.

While at it, also sort the existing targets and clarify that
NR_ONCHIP_DMA_CHANNELS must be a multiply of two.

[1] https://www.renesas.com/us/en/document/mah/sh7709s-group-hardware-manual (p. 373)

Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
---

v2: - sort existing targets
    - clarify that the value must be a multiply of two

 arch/sh/drivers/dma/Kconfig | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

Comments

Geert Uytterhoeven June 7, 2023, 9:16 a.m. UTC | #1 
Hi Artur,

On Sat, May 27, 2023 at 6:45 PM Artur Rojek <contact@artur-rojek.eu> wrote:
> According to the hardware manual [1], the DMAC found in SH7709 features
> only 4 channels.
>
> While at it, also sort the existing targets and clarify that
> NR_ONCHIP_DMA_CHANNELS must be a multiply of two.
>
> [1] https://www.renesas.com/us/en/document/mah/sh7709s-group-hardware-manual (p. 373)
>
> Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
> ---
>
> v2: - sort existing targets

Thanks for the update!

>     - clarify that the value must be a multiply of two

That's only true when there are two DMACs, right?

Even in that case, you could mitigate that by avoiding the division by

    #ifdef SH_DMAC_BASE1
   -#define        SH_DMAC_NR_MD_CH        (CONFIG_NR_ONCHIP_DMA_CHANNELS / 2)
   +#define        SH_DMAC_NR_MD_CH        6
    #else
    #define        SH_DMAC_NR_MD_CH        CONFIG_NR_ONCHIP_DMA_CHANNELS
    #endif

That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
when configuring his kernel, thus breaking DMA  due to an incorrect
value of SH_DMAC_NR_MD_CH.

Unfortunately we cannot protect against that when using a single DMAC,
as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.

Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
to protect against a user overriding this value?

> --- a/arch/sh/drivers/dma/Kconfig
> +++ b/arch/sh/drivers/dma/Kconfig
> @@ -28,17 +28,19 @@ config SH_DMA_API
>  config NR_ONCHIP_DMA_CHANNELS
>         int
>         depends on SH_DMA
> -       default "4" if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \
> -                      CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
> +       default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750  || \
> +                      CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7751 || \
> +                      CPU_SUBTYPE_SH7091
>         default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
>                        CPU_SUBTYPE_SH7760
> -       default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \
> -                       CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724
> +       default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724  || \
> +                       CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
>         default "6"
>         help
>           This allows you to specify the number of channels that the on-chip
> -         DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
> -         SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
> +         DMAC supports. This will be 4 for SH7709/SH7750/SH7750S/SH7751/SH7091,
> +         8 for SH7750R/SH7751R/SH7760, and 12 for SH7723/SH7724/SH7780/SH7785.
> +         Default is 6. Must be an even number.

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
John Paul Adrian Glaubitz June 8, 2023, 9:54 a.m. UTC | #2 
Hi!

Sorry for being so late to the party.

On Wed, 2023-06-07 at 11:16 +0200, Geert Uytterhoeven wrote:
> Hi Artur,
> 
> On Sat, May 27, 2023 at 6:45 PM Artur Rojek <contact@artur-rojek.eu> wrote:
> > According to the hardware manual [1], the DMAC found in SH7709 features
> > only 4 channels.
> > 
> > While at it, also sort the existing targets and clarify that
> > NR_ONCHIP_DMA_CHANNELS must be a multiply of two.
> > 
> > [1] https://www.renesas.com/us/en/document/mah/sh7709s-group-hardware-manual (p. 373)
> > 
> > Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
> > ---
> > 
> > v2: - sort existing targets
> 
> Thanks for the update!
> 
> >     - clarify that the value must be a multiply of two
> 
> That's only true when there are two DMACs, right?
> 
> Even in that case, you could mitigate that by avoiding the division by
> 
>     #ifdef SH_DMAC_BASE1
>    -#define        SH_DMAC_NR_MD_CH        (CONFIG_NR_ONCHIP_DMA_CHANNELS / 2)
>    +#define        SH_DMAC_NR_MD_CH        6
>     #else
>     #define        SH_DMAC_NR_MD_CH        CONFIG_NR_ONCHIP_DMA_CHANNELS
>     #endif

Aren't we dropping SH_DMAC_BASE1 in the other patch anyway?

> That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
> when configuring his kernel, thus breaking DMA  due to an incorrect
> value of SH_DMAC_NR_MD_CH.
> 
> Unfortunately we cannot protect against that when using a single DMAC,
> as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.
> 
> Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
> to protect against a user overriding this value?

Isn't SH_DMAC_NR_MD_CH already hardwired to the SoC being used?

Adrian
Geert Uytterhoeven June 8, 2023, 9:58 a.m. UTC | #3 
Hi Adrian,

On Thu, Jun 8, 2023 at 11:54 AM John Paul Adrian Glaubitz
<glaubitz@physik.fu-berlin.de> wrote:
> On Wed, 2023-06-07 at 11:16 +0200, Geert Uytterhoeven wrote:
> > On Sat, May 27, 2023 at 6:45 PM Artur Rojek <contact@artur-rojek.eu> wrote:
> > > According to the hardware manual [1], the DMAC found in SH7709 features
> > > only 4 channels.
> > >
> > > While at it, also sort the existing targets and clarify that
> > > NR_ONCHIP_DMA_CHANNELS must be a multiply of two.
> > >
> > > [1] https://www.renesas.com/us/en/document/mah/sh7709s-group-hardware-manual (p. 373)
> > >
> > > Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
> > > ---
> > >
> > > v2: - sort existing targets
> >
> > Thanks for the update!
> >
> > >     - clarify that the value must be a multiply of two
> >
> > That's only true when there are two DMACs, right?
> >
> > Even in that case, you could mitigate that by avoiding the division by
> >
> >     #ifdef SH_DMAC_BASE1
> >    -#define        SH_DMAC_NR_MD_CH        (CONFIG_NR_ONCHIP_DMA_CHANNELS / 2)
> >    +#define        SH_DMAC_NR_MD_CH        6
> >     #else
> >     #define        SH_DMAC_NR_MD_CH        CONFIG_NR_ONCHIP_DMA_CHANNELS
> >     #endif
>
> Aren't we dropping SH_DMAC_BASE1 in the other patch anyway?

Only for the SH4 parts that do not have it.
It is still set in arch/sh/include/cpu-sh4a/cpu/dma.h for the SH4a parts with
12 channels and 2 DMACs.

> > That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
> > when configuring his kernel, thus breaking DMA  due to an incorrect
> > value of SH_DMAC_NR_MD_CH.
> >
> > Unfortunately we cannot protect against that when using a single DMAC,
> > as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.
> >
> > Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
> > to protect against a user overriding this value?
>
> Isn't SH_DMAC_NR_MD_CH already hardwired to the SoC being used?

It depends on CONFIG_NR_ONCHIP_DMA_CHANNELS, while it
should be fixed based on the SoC.

Gr{oetje,eeting}s,

                        Geert
John Paul Adrian Glaubitz June 8, 2023, 10:03 a.m. UTC | #4 
Hi Geert!

On Thu, 2023-06-08 at 11:58 +0200, Geert Uytterhoeven wrote:
> > 
> > Aren't we dropping SH_DMAC_BASE1 in the other patch anyway?
> 
> Only for the SH4 parts that do not have it.
> It is still set in arch/sh/include/cpu-sh4a/cpu/dma.h for the SH4a parts with
> 12 channels and 2 DMACs.

OK, thanks for the clarification. I will review the other patches tonight.

> > > That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
> > > when configuring his kernel, thus breaking DMA  due to an incorrect
> > > value of SH_DMAC_NR_MD_CH.
> > > 
> > > Unfortunately we cannot protect against that when using a single DMAC,
> > > as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.
> > > 
> > > Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
> > > to protect against a user overriding this value?
> > 
> > Isn't SH_DMAC_NR_MD_CH already hardwired to the SoC being used?
> 
> It depends on CONFIG_NR_ONCHIP_DMA_CHANNELS, while it
> should be fixed based on the SoC.

I agree. However, I would be fine with merging this patch set first and fixing
this particular issue in a follow-up series.

Adrian
John Paul Adrian Glaubitz June 17, 2023, 7:31 a.m. UTC | #5 
Hi Geert!

On Thu, 2023-06-08 at 12:03 +0200, John Paul Adrian Glaubitz wrote:
> > > > That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
> > > > when configuring his kernel, thus breaking DMA  due to an incorrect
> > > > value of SH_DMAC_NR_MD_CH.
> > > > 
> > > > Unfortunately we cannot protect against that when using a single DMAC,
> > > > as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.
> > > > 
> > > > Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
> > > > to protect against a user overriding this value?
> > > 
> > > Isn't SH_DMAC_NR_MD_CH already hardwired to the SoC being used?
> > 
> > It depends on CONFIG_NR_ONCHIP_DMA_CHANNELS, while it
> > should be fixed based on the SoC.
> 
> I agree. However, I would be fine with merging this patch set first and fixing
> this particular issue in a follow-up series.

So, my suggestion is to take this series as-is for 6.5, then get the other issues
you mentioned fixed for 6.6. I think it's already a gain when these issues are
fixed and the kernel boots on the HP Journada 680 again.

Adrian
Geert Uytterhoeven June 17, 2023, 11:09 a.m. UTC | #6 
Hi Adrian,

On Sat, Jun 17, 2023 at 9:32 AM John Paul Adrian Glaubitz
<glaubitz@physik.fu-berlin.de> wrote:
> On Thu, 2023-06-08 at 12:03 +0200, John Paul Adrian Glaubitz wrote:
> > > > > That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
> > > > > when configuring his kernel, thus breaking DMA  due to an incorrect
> > > > > value of SH_DMAC_NR_MD_CH.
> > > > >
> > > > > Unfortunately we cannot protect against that when using a single DMAC,
> > > > > as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.
> > > > >
> > > > > Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
> > > > > to protect against a user overriding this value?
> > > >
> > > > Isn't SH_DMAC_NR_MD_CH already hardwired to the SoC being used?
> > >
> > > It depends on CONFIG_NR_ONCHIP_DMA_CHANNELS, while it
> > > should be fixed based on the SoC.
> >
> > I agree. However, I would be fine with merging this patch set first and fixing
> > this particular issue in a follow-up series.
>
> So, my suggestion is to take this series as-is for 6.5, then get the other issues
> you mentioned fixed for 6.6. I think it's already a gain when these issues are
> fixed and the kernel boots on the HP Journada 680 again.

Sure, I don't want to block the acceptance of this series at all.
Thanks!

Gr{oetje,eeting}s,

                        Geert
John Paul Adrian Glaubitz July 4, 2023, 5:45 a.m. UTC | #7 
Hi Geert!

On Sat, 2023-06-17 at 13:09 +0200, Geert Uytterhoeven wrote:
> Hi Adrian,
> 
> On Sat, Jun 17, 2023 at 9:32 AM John Paul Adrian Glaubitz
> <glaubitz@physik.fu-berlin.de> wrote:
> > On Thu, 2023-06-08 at 12:03 +0200, John Paul Adrian Glaubitz wrote:
> > > > > > That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
> > > > > > when configuring his kernel, thus breaking DMA  due to an incorrect
> > > > > > value of SH_DMAC_NR_MD_CH.
> > > > > > 
> > > > > > Unfortunately we cannot protect against that when using a single DMAC,
> > > > > > as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.
> > > > > > 
> > > > > > Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
> > > > > > to protect against a user overriding this value?
> > > > > 
> > > > > Isn't SH_DMAC_NR_MD_CH already hardwired to the SoC being used?
> > > > 
> > > > It depends on CONFIG_NR_ONCHIP_DMA_CHANNELS, while it
> > > > should be fixed based on the SoC.
> > > 
> > > I agree. However, I would be fine with merging this patch set first and fixing
> > > this particular issue in a follow-up series.
> > 
> > So, my suggestion is to take this series as-is for 6.5, then get the other issues
> > you mentioned fixed for 6.6. I think it's already a gain when these issues are
> > fixed and the kernel boots on the HP Journada 680 again.
> 
> Sure, I don't want to block the acceptance of this series at all.
> Thanks!

Apologies for the late reply. Would you mind adding your Reviewed-by to this patch
before I review and apply the series?

Adrian
Geert Uytterhoeven July 4, 2023, 7:32 a.m. UTC | #8 
Hi Adrian,

On Tue, Jul 4, 2023 at 7:45 AM John Paul Adrian Glaubitz
<glaubitz@physik.fu-berlin.de> wrote:
> On Sat, 2023-06-17 at 13:09 +0200, Geert Uytterhoeven wrote:
> > On Sat, Jun 17, 2023 at 9:32 AM John Paul Adrian Glaubitz
> > <glaubitz@physik.fu-berlin.de> wrote:
> > > On Thu, 2023-06-08 at 12:03 +0200, John Paul Adrian Glaubitz wrote:
> > > > > > > That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
> > > > > > > when configuring his kernel, thus breaking DMA  due to an incorrect
> > > > > > > value of SH_DMAC_NR_MD_CH.
> > > > > > >
> > > > > > > Unfortunately we cannot protect against that when using a single DMAC,
> > > > > > > as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.
> > > > > > >
> > > > > > > Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
> > > > > > > to protect against a user overriding this value?
> > > > > >
> > > > > > Isn't SH_DMAC_NR_MD_CH already hardwired to the SoC being used?
> > > > >
> > > > > It depends on CONFIG_NR_ONCHIP_DMA_CHANNELS, while it
> > > > > should be fixed based on the SoC.
> > > >
> > > > I agree. However, I would be fine with merging this patch set first and fixing
> > > > this particular issue in a follow-up series.
> > >
> > > So, my suggestion is to take this series as-is for 6.5, then get the other issues
> > > you mentioned fixed for 6.6. I think it's already a gain when these issues are
> > > fixed and the kernel boots on the HP Journada 680 again.
> >
> > Sure, I don't want to block the acceptance of this series at all.
> > Thanks!
>
> Apologies for the late reply. Would you mind adding your Reviewed-by to this patch
> before I review and apply the series?

With "must be a multiply of two" and "Must be an even number" removed.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert
John Paul Adrian Glaubitz July 4, 2023, 7:43 a.m. UTC | #9 
Hi Geert!

On Tue, 2023-07-04 at 09:32 +0200, Geert Uytterhoeven wrote:
> Hi Adrian,
> 
> On Tue, Jul 4, 2023 at 7:45 AM John Paul Adrian Glaubitz
> <glaubitz@physik.fu-berlin.de> wrote:
> > On Sat, 2023-06-17 at 13:09 +0200, Geert Uytterhoeven wrote:
> > > On Sat, Jun 17, 2023 at 9:32 AM John Paul Adrian Glaubitz
> > > <glaubitz@physik.fu-berlin.de> wrote:
> > > > On Thu, 2023-06-08 at 12:03 +0200, John Paul Adrian Glaubitz wrote:
> > > > > > > > That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
> > > > > > > > when configuring his kernel, thus breaking DMA  due to an incorrect
> > > > > > > > value of SH_DMAC_NR_MD_CH.
> > > > > > > > 
> > > > > > > > Unfortunately we cannot protect against that when using a single DMAC,
> > > > > > > > as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.
> > > > > > > > 
> > > > > > > > Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
> > > > > > > > to protect against a user overriding this value?
> > > > > > > 
> > > > > > > Isn't SH_DMAC_NR_MD_CH already hardwired to the SoC being used?
> > > > > > 
> > > > > > It depends on CONFIG_NR_ONCHIP_DMA_CHANNELS, while it
> > > > > > should be fixed based on the SoC.
> > > > > 
> > > > > I agree. However, I would be fine with merging this patch set first and fixing
> > > > > this particular issue in a follow-up series.
> > > > 
> > > > So, my suggestion is to take this series as-is for 6.5, then get the other issues
> > > > you mentioned fixed for 6.6. I think it's already a gain when these issues are
> > > > fixed and the kernel boots on the HP Journada 680 again.
> > > 
> > > Sure, I don't want to block the acceptance of this series at all.
> > > Thanks!
> > 
> > Apologies for the late reply. Would you mind adding your Reviewed-by to this patch
> > before I review and apply the series?
> 
> With "must be a multiply of two" and "Must be an even number" removed.
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks. I guess, I will drop the whole

	"and clarify that NR_ONCHIP_DMA_CHANNELS must be a multiply of two"

then. Correct?

Adrian
Geert Uytterhoeven July 4, 2023, 7:54 a.m. UTC | #10 
Hi Adrian.

On Tue, Jul 4, 2023 at 9:43 AM John Paul Adrian Glaubitz
<glaubitz@physik.fu-berlin.de> wrote:
> On Tue, 2023-07-04 at 09:32 +0200, Geert Uytterhoeven wrote:
> > On Tue, Jul 4, 2023 at 7:45 AM John Paul Adrian Glaubitz
> > <glaubitz@physik.fu-berlin.de> wrote:
> > > On Sat, 2023-06-17 at 13:09 +0200, Geert Uytterhoeven wrote:
> > > > On Sat, Jun 17, 2023 at 9:32 AM John Paul Adrian Glaubitz
> > > > <glaubitz@physik.fu-berlin.de> wrote:
> > > > > On Thu, 2023-06-08 at 12:03 +0200, John Paul Adrian Glaubitz wrote:
> > > > > > > > > That is actually safer, as the user can override NR_ONCHIP_DMA_CHANNELS
> > > > > > > > > when configuring his kernel, thus breaking DMA  due to an incorrect
> > > > > > > > > value of SH_DMAC_NR_MD_CH.
> > > > > > > > >
> > > > > > > > > Unfortunately we cannot protect against that when using a single DMAC,
> > > > > > > > > as SH_DMAC_NR_MD_CH can be either 4, 6, or 8.
> > > > > > > > >
> > > > > > > > > Perhaps this configuration should be moved from Kconfig to <cpu/dma.h>,
> > > > > > > > > to protect against a user overriding this value?
> > > > > > > >
> > > > > > > > Isn't SH_DMAC_NR_MD_CH already hardwired to the SoC being used?
> > > > > > >
> > > > > > > It depends on CONFIG_NR_ONCHIP_DMA_CHANNELS, while it
> > > > > > > should be fixed based on the SoC.
> > > > > >
> > > > > > I agree. However, I would be fine with merging this patch set first and fixing
> > > > > > this particular issue in a follow-up series.
> > > > >
> > > > > So, my suggestion is to take this series as-is for 6.5, then get the other issues
> > > > > you mentioned fixed for 6.6. I think it's already a gain when these issues are
> > > > > fixed and the kernel boots on the HP Journada 680 again.
> > > >
> > > > Sure, I don't want to block the acceptance of this series at all.
> > > > Thanks!
> > >
> > > Apologies for the late reply. Would you mind adding your Reviewed-by to this patch
> > > before I review and apply the series?
> >
> > With "must be a multiply of two" and "Must be an even number" removed.
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Thanks. I guess, I will drop the whole
>
>         "and clarify that NR_ONCHIP_DMA_CHANNELS must be a multiply of two"
>
> then. Correct?

Correct. Also in the help text.
Thanks!

Gr{oetje,eeting}s,

                        Geert
John Paul Adrian Glaubitz July 4, 2023, 8:35 p.m. UTC | #11 
On Sat, 2023-05-27 at 18:44 +0200, Artur Rojek wrote:
> According to the hardware manual [1], the DMAC found in SH7709 features
> only 4 channels.
> 
> While at it, also sort the existing targets and clarify that
> NR_ONCHIP_DMA_CHANNELS must be a multiply of two.
> 
> [1] https://www.renesas.com/us/en/document/mah/sh7709s-group-hardware-manual (p. 373)
> 
> Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
> ---
> 
> v2: - sort existing targets
>     - clarify that the value must be a multiply of two
> 
>  arch/sh/drivers/dma/Kconfig | 14 ++++++++------
>  1 file changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
> index 7d54f284ce10..382fbb189fcf 100644
> --- a/arch/sh/drivers/dma/Kconfig
> +++ b/arch/sh/drivers/dma/Kconfig
> @@ -28,17 +28,19 @@ config SH_DMA_API
>  config NR_ONCHIP_DMA_CHANNELS
>  	int
>  	depends on SH_DMA
> -	default "4" if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \
> -		       CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
> +	default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750  || \
> +		       CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7751 || \
> +		       CPU_SUBTYPE_SH7091
>  	default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
>  		       CPU_SUBTYPE_SH7760
> -	default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \
> -			CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724
> +	default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724  || \
> +			CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
>  	default "6"
>  	help
>  	  This allows you to specify the number of channels that the on-chip
> -	  DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
> -	  SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
> +	  DMAC supports. This will be 4 for SH7709/SH7750/SH7750S/SH7751/SH7091,
> +	  8 for SH7750R/SH7751R/SH7760, and 12 for SH7723/SH7724/SH7780/SH7785.
> +	  Default is 6. Must be an even number.
>  
>  config SH_DMABRG
>  	bool "SH7760 DMABRG support"

Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
diff mbox series

Patch

diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index 7d54f284ce10..382fbb189fcf 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -28,17 +28,19 @@  config SH_DMA_API
 config NR_ONCHIP_DMA_CHANNELS
 	int
 	depends on SH_DMA
-	default "4" if CPU_SUBTYPE_SH7750  || CPU_SUBTYPE_SH7751  || \
-		       CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
+	default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750  || \
+		       CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7751 || \
+		       CPU_SUBTYPE_SH7091
 	default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
 		       CPU_SUBTYPE_SH7760
-	default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780  || \
-			CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724
+	default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724  || \
+			CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
 	default "6"
 	help
 	  This allows you to specify the number of channels that the on-chip
-	  DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
-	  SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
+	  DMAC supports. This will be 4 for SH7709/SH7750/SH7750S/SH7751/SH7091,
+	  8 for SH7750R/SH7751R/SH7760, and 12 for SH7723/SH7724/SH7780/SH7785.
+	  Default is 6. Must be an even number.
 
 config SH_DMABRG
 	bool "SH7760 DMABRG support"