Message ID | 20230527164452.64797-3-contact@artur-rojek.eu |
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State | New |
Headers |
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Series |
SuperH DMAC fixes
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Commit Message
Artur Rojek
May 27, 2023, 4:44 p.m. UTC
None of the supported SH4 family SoCs features a second DMAC module. As
this define negatively impacts DMA channel calculation for the above
targets, remove it from the code.
Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
---
v2: new patch
arch/sh/include/cpu-sh4/cpu/dma.h | 1 -
1 file changed, 1 deletion(-)
Comments
On Sat, May 27, 2023 at 6:45 PM Artur Rojek <contact@artur-rojek.eu> wrote: > None of the supported SH4 family SoCs features a second DMAC module. As > this define negatively impacts DMA channel calculation for the above > targets, remove it from the code. > > Signed-off-by: Artur Rojek <contact@artur-rojek.eu> > --- > > v2: new patch Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Sat, 2023-05-27 at 18:44 +0200, Artur Rojek wrote: > None of the supported SH4 family SoCs features a second DMAC module. As > this define negatively impacts DMA channel calculation for the above > targets, remove it from the code. > > Signed-off-by: Artur Rojek <contact@artur-rojek.eu> > --- > > v2: new patch > > arch/sh/include/cpu-sh4/cpu/dma.h | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h > index 38187d06b234..e97fb2c79177 100644 > --- a/arch/sh/include/cpu-sh4/cpu/dma.h > +++ b/arch/sh/include/cpu-sh4/cpu/dma.h > @@ -13,6 +13,5 @@ > #define DMAE0_IRQ evt2irq(0x6c0) > > #define SH_DMAC_BASE0 0xffa00000 > -#define SH_DMAC_BASE1 0xffa00070 > > #endif /* __ASM_CPU_SH4_DMA_H */ Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h index 38187d06b234..e97fb2c79177 100644 --- a/arch/sh/include/cpu-sh4/cpu/dma.h +++ b/arch/sh/include/cpu-sh4/cpu/dma.h @@ -13,6 +13,5 @@ #define DMAE0_IRQ evt2irq(0x6c0) #define SH_DMAC_BASE0 0xffa00000 -#define SH_DMAC_BASE1 0xffa00070 #endif /* __ASM_CPU_SH4_DMA_H */