Message ID | 20230526062529.46747-2-william.qiu@starfivetech.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h3-20020a17090aa88300b0024df9b42c22si3339951pjq.67.2023.05.25.23.37.55; Thu, 25 May 2023 23:38:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242168AbjEZGZr convert rfc822-to-8bit (ORCPT <rfc822;zhanglyra.2023@gmail.com> + 99 others); Fri, 26 May 2023 02:25:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59210 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242145AbjEZGZm (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 26 May 2023 02:25:42 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 143CA1B5; Thu, 25 May 2023 23:25:39 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 9DA6624DBBE; Fri, 26 May 2023 14:25:31 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 26 May 2023 14:25:31 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 26 May 2023 14:25:30 +0800 From: William Qiu <william.qiu@starfivetech.com> To: <devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org> CC: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Emil Renner Berthing <kernel@esmil.dk>, Ziv Xu <ziv.xu@starfivetech.com>, William Qiu <william.qiu@starfivetech.com> Subject: [PATCH v1 1/3] dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC Date: Fri, 26 May 2023 14:25:27 +0800 Message-ID: <20230526062529.46747-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230526062529.46747-1-william.qiu@starfivetech.com> References: <20230526062529.46747-1-william.qiu@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766937683012382946?= X-GMAIL-MSGID: =?utf-8?q?1766937683012382946?= |
Series |
Add initialization of clock for StarFive JH7110 SoC
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Commit Message
William Qiu
May 26, 2023, 6:25 a.m. UTC
The QSPI controller needs three clock items to work properly on StarFive JH7110 SoC, so there is need to change the maxItems's value to 3. Other platforms do not have this constraint. Signed-off-by: William Qiu <william.qiu@starfivetech.com> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> --- .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-)
Comments
On Fri, May 26, 2023 at 02:25:27PM +0800, William Qiu wrote: > then: > properties: > + clocks: > + maxItems: 3 > + > + clock-names: > + items: > + - const: qspi-ref > + - const: qspi-ahb > + - const: qspi-apb > + Are these really the names that the clocks have in the IP? It seems weird that they'd include the IP name in there and not just be ref, ahb and apb.
On 2023/5/26 23:33, Mark Brown wrote: > On Fri, May 26, 2023 at 02:25:27PM +0800, William Qiu wrote: > >> then: >> properties: >> + clocks: >> + maxItems: 3 >> + >> + clock-names: >> + items: >> + - const: qspi-ref >> + - const: qspi-ahb >> + - const: qspi-apb >> + > > Are these really the names that the clocks have in the IP? It seems > weird that they'd include the IP name in there and not just be ref, ahb > and apb. Hi Mark, These three clocks are the internal clocks in the IP. The AHB clock is the main system clock used to transfer data over the AHB bus between an external master and the QSPI controller. The APB clock is used to access the register map of the QSPI controller, perform controller and device configuration.service interrupts and control certain run time modes. The reference clock is used to serialize the data and drive the external SPI interface. I'm going to change the names of these three clocks to hclk, pclk, and ref_clk, as defined in the data book. What do you think? Thanks for taking time to review this patch series and give useful suggestions. Best regards, William
On Mon, May 29, 2023 at 02:44:13PM +0800, William Qiu wrote: > On 2023/5/26 23:33, Mark Brown wrote: > > On Fri, May 26, 2023 at 02:25:27PM +0800, William Qiu wrote: > >> + clock-names: > >> + items: > >> + - const: qspi-ref > >> + - const: qspi-ahb > >> + - const: qspi-apb > I'm going to change the names of these three clocks to hclk, pclk, > and ref_clk, as defined in the data book. What do you think? That looks fine. ref, ahb and apb would also be fine, it's just the qspi- prefix that I was querying.
On 2023/5/30 18:02, Mark Brown wrote: > On Mon, May 29, 2023 at 02:44:13PM +0800, William Qiu wrote: >> On 2023/5/26 23:33, Mark Brown wrote: >> > On Fri, May 26, 2023 at 02:25:27PM +0800, William Qiu wrote: > >> >> + clock-names: >> >> + items: >> >> + - const: qspi-ref >> >> + - const: qspi-ahb >> >> + - const: qspi-apb > >> I'm going to change the names of these three clocks to hclk, pclk, >> and ref_clk, as defined in the data book. What do you think? > > That looks fine. ref, ahb and apb would also be fine, it's just the > qspi- prefix that I was querying. That's fine. I will fix it in next version. Best regards, William
diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index b310069762dd..737f1c162e01 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -26,6 +26,15 @@ allOf: const: starfive,jh7110-qspi then: properties: + clocks: + maxItems: 3 + + clock-names: + items: + - const: qspi-ref + - const: qspi-ahb + - const: qspi-apb + resets: minItems: 2 maxItems: 3 @@ -38,6 +47,9 @@ allOf: else: properties: + clocks: + maxItems: 1 + resets: maxItems: 2 @@ -69,9 +81,6 @@ properties: interrupts: maxItems: 1 - clocks: - maxItems: 1 - cdns,fifo-depth: description: Size of the data FIFO in words.