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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id c25-20020ac24159000000b004cc8196a308sm290902lfi.98.2023.05.30.03.20.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 May 2023 03:20:16 -0700 (PDT) From: Konrad Dybcio Date: Tue, 30 May 2023 12:20:09 +0200 Subject: [PATCH 10/20] interconnect: qcom: Define RPM bus clocks MIME-Version: 1.0 Message-Id: <20230526-topic-smd_icc-v1-10-1bf8e6663c4e@linaro.org> References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> In-Reply-To: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1685442001; l=3698; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=fXrsqgc0ESuIHhXQ72pw1fVDYdStaeM5EbSnljGFx/s=; b=dQGfnVFW1/E2mzOi1RzGRMIIivQGDxwKRv7adDq14OX8J/0R+OpkYstNp69Wb/gXFkT7LhSNN 4OBlzi7j5CnDZESYR4owbIci7A29ThOIOdN0qLUXa7Zr46MIZpvoptI X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767314284700273392?= X-GMAIL-MSGID: =?utf-8?q?1767314284700273392?= Add the definitions for RPM bus clocks that will be used by many different platforms. Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov --- drivers/interconnect/qcom/Makefile | 2 +- drivers/interconnect/qcom/icc-rpm-clocks.c | 66 ++++++++++++++++++++++++++++++ drivers/interconnect/qcom/icc-rpm.h | 13 ++++++ 3 files changed, 80 insertions(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/Makefile b/drivers/interconnect/qcom/Makefile index ab988926433c..80d9d2da95d1 100644 --- a/drivers/interconnect/qcom/Makefile +++ b/drivers/interconnect/qcom/Makefile @@ -29,7 +29,7 @@ qnoc-sm8250-objs := sm8250.o qnoc-sm8350-objs := sm8350.o qnoc-sm8450-objs := sm8450.o qnoc-sm8550-objs := sm8550.o -icc-smd-rpm-objs := smd-rpm.o icc-rpm.o +icc-smd-rpm-objs := smd-rpm.o icc-rpm.o icc-rpm-clocks.o obj-$(CONFIG_INTERCONNECT_QCOM_BCM_VOTER) += icc-bcm-voter.o obj-$(CONFIG_INTERCONNECT_QCOM_MSM8916) += qnoc-msm8916.o diff --git a/drivers/interconnect/qcom/icc-rpm-clocks.c b/drivers/interconnect/qcom/icc-rpm-clocks.c new file mode 100644 index 000000000000..a195bf32aff4 --- /dev/null +++ b/drivers/interconnect/qcom/icc-rpm-clocks.c @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Linaro Ltd + */ + +#include + +#include "icc-rpm.h" + +const struct rpm_clk_resource aggre1_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 1, +}; + +const struct rpm_clk_resource aggre2_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 2, +}; + +const struct rpm_clk_resource bimc_clk = { + .resource_type = QCOM_SMD_RPM_MEM_CLK, + .clock_id = 0, +}; + +const struct rpm_clk_resource bus_0_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 0, +}; + +const struct rpm_clk_resource bus_1_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 1, +}; + +const struct rpm_clk_resource bus_2_clk = { + .resource_type = QCOM_SMD_RPM_BUS_CLK, + .clock_id = 2, +}; + +const struct rpm_clk_resource mmaxi_0_clk = { + .resource_type = QCOM_SMD_RPM_MMAXI_CLK, + .clock_id = 0, +}; + +const struct rpm_clk_resource mmaxi_1_clk = { + .resource_type = QCOM_SMD_RPM_MMAXI_CLK, + .clock_id = 1, +}; + +const struct rpm_clk_resource qup_clk = { + .resource_type = QCOM_SMD_RPM_QUP_CLK, + .clock_id = 0, +}; + +/* Branch clocks */ +const struct rpm_clk_resource aggre1_branch_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 1, + .branch = true, +}; + +const struct rpm_clk_resource aggre2_branch_clk = { + .resource_type = QCOM_SMD_RPM_AGGR_CLK, + .clock_id = 2, + .branch = true, +}; diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 09abdd0c891e..e3df066fd94e 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -136,6 +136,19 @@ enum qos_mode { NOC_QOS_MODE_BYPASS, }; +extern const struct rpm_clk_resource aggre1_clk; +extern const struct rpm_clk_resource aggre2_clk; +extern const struct rpm_clk_resource bimc_clk; +extern const struct rpm_clk_resource bus_0_clk; +extern const struct rpm_clk_resource bus_1_clk; +extern const struct rpm_clk_resource bus_2_clk; +extern const struct rpm_clk_resource mmaxi_0_clk; +extern const struct rpm_clk_resource mmaxi_1_clk; +extern const struct rpm_clk_resource qup_clk; + +extern const struct rpm_clk_resource aggre1_branch_clk; +extern const struct rpm_clk_resource aggre2_branch_clk; + int qnoc_probe(struct platform_device *pdev); int qnoc_remove(struct platform_device *pdev);