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The DSI PHY label is particularly weird because the DSI number is at the end (&dsi_phy0) while DSI itself is called &dsi0. Follow the example of more recent SoCs and give all the MDSS related nodes a consistent label that allows proper grouping. Signed-off-by: Stephan Gerhold --- arch/arm64/boot/dts/qcom/apq8016-sbc.dts | 12 +++--- arch/arm64/boot/dts/qcom/msm8916-pm8916.dtsi | 4 +- .../dts/qcom/msm8916-samsung-a2015-common.dtsi | 10 ++--- .../boot/dts/qcom/msm8916-samsung-a3u-eur.dts | 6 +-- arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi | 2 +- arch/arm64/boot/dts/qcom/msm8916.dtsi | 26 ++++++------ arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi | 10 ++--- arch/arm64/boot/dts/qcom/msm8939.dtsi | 46 +++++++++++----------- 8 files changed, 58 insertions(+), 58 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts index 4f3d837578fd..9081825c9574 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts @@ -211,7 +211,7 @@ ports { port@0 { reg = <0>; adv7533_in: endpoint { - remote-endpoint = <&dsi0_out>; + remote-endpoint = <&mdss_dsi0_out>; }; }; @@ -301,11 +301,6 @@ ov5640_ep: endpoint { }; }; -&dsi0_out { - data-lanes = <0 1 2 3>; - remote-endpoint = <&adv7533_in>; -}; - &lpass { status = "okay"; }; @@ -318,6 +313,11 @@ &mdss { status = "okay"; }; +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&adv7533_in>; +}; + &mpss { status = "okay"; diff --git a/arch/arm64/boot/dts/qcom/msm8916-pm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pm8916.dtsi index 64d7228bee07..4e7289e6d22d 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-pm8916.dtsi @@ -15,12 +15,12 @@ &camss { vdda-supply = <&pm8916_l2>; }; -&dsi0 { +&mdss_dsi0 { vdda-supply = <&pm8916_l2>; vddio-supply = <&pm8916_l6>; }; -&dsi_phy0 { +&mdss_dsi0_phy { vddio-supply = <&pm8916_l6>; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi index 497fc83803ef..b1af9c5d07b2 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-a2015-common.dtsi @@ -237,16 +237,16 @@ &blsp_uart2 { status = "okay"; }; -&dsi0 { +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&mdss_default>; pinctrl-1 = <&mdss_sleep>; }; -&mdss { - status = "okay"; -}; - &pm8916_resin { status = "okay"; linux,code = ; diff --git a/arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts b/arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts index 9068aa6f7b29..e5a569698c4f 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts +++ b/arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts @@ -85,7 +85,7 @@ &clk_pwm { status = "okay"; }; -&dsi0 { +&mdss_dsi0 { panel@0 { reg = <0>; @@ -97,13 +97,13 @@ panel@0 { port { panel_in: endpoint { - remote-endpoint = <&dsi0_out>; + remote-endpoint = <&mdss_dsi0_out>; }; }; }; }; -&dsi0_out { +&mdss_dsi0_out { data-lanes = <0 1>; remote-endpoint = <&panel_in>; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi b/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi index 898722ee86a5..ac39ac6a21c1 100644 --- a/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916-ufi.dtsi @@ -86,7 +86,7 @@ &blsp_uart2 { status = "okay"; }; -/* Remove &dsi_phy0 from clocks to make sure that gcc probes with display disabled */ +/* Remove &mdss_dsi0_phy from clocks to make sure that gcc probes with display disabled */ &gcc { clocks = <&xo_board>, <&sleep_clk>, <0>, <0>, <0>, <0>, <0>; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 7e6a60e6edef..0028a405e3ec 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1012,8 +1012,8 @@ gcc: clock-controller@1800000 { reg = <0x01800000 0x80000>; clocks = <&xo_board>, <&sleep_clk>, - <&dsi_phy0 1>, - <&dsi_phy0 0>, + <&mdss_dsi0_phy 1>, + <&mdss_dsi0_phy 0>, <0>, <0>, <0>; @@ -1062,7 +1062,7 @@ mdss: display-subsystem@1a00000 { #size-cells = <1>; ranges; - mdp: display-controller@1a01000 { + mdss_mdp: display-controller@1a01000 { compatible = "qcom,msm8916-mdp5", "qcom,mdp5"; reg = <0x01a01000 0x89000>; reg-names = "mdp_phys"; @@ -1087,14 +1087,14 @@ ports { port@0 { reg = <0>; - mdp5_intf1_out: endpoint { - remote-endpoint = <&dsi0_in>; + mdss_mdp_intf1_out: endpoint { + remote-endpoint = <&mdss_dsi0_in>; }; }; }; }; - dsi0: dsi@1a98000 { + mdss_dsi0: dsi@1a98000 { compatible = "qcom,msm8916-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg = <0x01a98000 0x25c>; @@ -1105,8 +1105,8 @@ dsi0: dsi@1a98000 { assigned-clocks = <&gcc BYTE0_CLK_SRC>, <&gcc PCLK0_CLK_SRC>; - assigned-clock-parents = <&dsi_phy0 0>, - <&dsi_phy0 1>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, + <&mdss_dsi0_phy 1>; clocks = <&gcc GCC_MDSS_MDP_CLK>, <&gcc GCC_MDSS_AHB_CLK>, @@ -1120,7 +1120,7 @@ dsi0: dsi@1a98000 { "byte", "pixel", "core"; - phys = <&dsi_phy0>; + phys = <&mdss_dsi0_phy>; #address-cells = <1>; #size-cells = <0>; @@ -1131,20 +1131,20 @@ ports { port@0 { reg = <0>; - dsi0_in: endpoint { - remote-endpoint = <&mdp5_intf1_out>; + mdss_dsi0_in: endpoint { + remote-endpoint = <&mdss_mdp_intf1_out>; }; }; port@1 { reg = <1>; - dsi0_out: endpoint { + mdss_dsi0_out: endpoint { }; }; }; }; - dsi_phy0: phy@1a98300 { + mdss_dsi0_phy: phy@1a98300 { compatible = "qcom,dsi-phy-28nm-lp"; reg = <0x01a98300 0xd4>, <0x01a98500 0x280>, diff --git a/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi index 24393a159058..33e02f42f5e4 100644 --- a/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi @@ -3,21 +3,21 @@ #include "msm8939.dtsi" #include "pm8916.dtsi" -&dsi0 { +&mdss_dsi0 { vdda-supply = <&pm8916_l2>; vddio-supply = <&pm8916_l6>; }; -&dsi1 { - vdda-supply = <&pm8916_l2>; +&mdss_dsi0_phy { vddio-supply = <&pm8916_l6>; }; -&dsi_phy0 { +&mdss_dsi1 { + vdda-supply = <&pm8916_l2>; vddio-supply = <&pm8916_l6>; }; -&dsi_phy1 { +&mdss_dsi1_phy { vddio-supply = <&pm8916_l6>; }; diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qcom/msm8939.dtsi index 1196a962897f..0d9f8b951b66 100644 --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi @@ -1187,8 +1187,8 @@ gcc: clock-controller@1800000 { reg = <0x01800000 0x80000>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>, - <&dsi_phy0 1>, - <&dsi_phy0 0>, + <&mdss_dsi0_phy 1>, + <&mdss_dsi0_phy 0>, <0>, <0>, <0>; @@ -1240,7 +1240,7 @@ mdss: display-subsystem@1a00000 { status = "disabled"; - mdp: display-controller@1a01000 { + mdss_mdp: display-controller@1a01000 { compatible = "qcom,mdp5"; reg = <0x01a01000 0x89000>; reg-names = "mdp_phys"; @@ -1269,21 +1269,21 @@ ports { port@0 { reg = <0>; - mdp5_intf1_out: endpoint { - remote-endpoint = <&dsi0_in>; + mdss_mdp_intf1_out: endpoint { + remote-endpoint = <&mdss_dsi0_in>; }; }; port@1 { reg = <1>; - mdp5_intf2_out: endpoint { - remote-endpoint = <&dsi1_in>; + mdss_mdp_intf2_out: endpoint { + remote-endpoint = <&mdss_dsi1_in>; }; }; }; }; - dsi0: dsi@1a98000 { + mdss_dsi0: dsi@1a98000 { compatible = "qcom,msm8916-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg = <0x01a98000 0x25c>; @@ -1306,10 +1306,10 @@ dsi0: dsi@1a98000 { "core"; assigned-clocks = <&gcc BYTE0_CLK_SRC>, <&gcc PCLK0_CLK_SRC>; - assigned-clock-parents = <&dsi_phy0 0>, - <&dsi_phy0 1>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, + <&mdss_dsi0_phy 1>; - phys = <&dsi_phy0>; + phys = <&mdss_dsi0_phy>; status = "disabled"; #address-cells = <1>; @@ -1321,20 +1321,20 @@ ports { port@0 { reg = <0>; - dsi0_in: endpoint { - remote-endpoint = <&mdp5_intf1_out>; + mdss_dsi0_in: endpoint { + remote-endpoint = <&mdss_mdp_intf1_out>; }; }; port@1 { reg = <1>; - dsi0_out: endpoint { + mdss_dsi0_out: endpoint { }; }; }; }; - dsi_phy0: phy@1a98300 { + mdss_dsi0_phy: phy@1a98300 { compatible = "qcom,dsi-phy-28nm-lp"; reg = <0x01a98300 0xd4>, <0x01a98500 0x280>, @@ -1352,7 +1352,7 @@ dsi_phy0: phy@1a98300 { status = "disabled"; }; - dsi1: dsi@1aa0000 { + mdss_dsi1: dsi@1aa0000 { compatible = "qcom,msm8916-dsi-ctrl", "qcom,mdss-dsi-ctrl"; reg = <0x01aa0000 0x25c>; @@ -1375,9 +1375,9 @@ dsi1: dsi@1aa0000 { "core"; assigned-clocks = <&gcc BYTE1_CLK_SRC>, <&gcc PCLK1_CLK_SRC>; - assigned-clock-parents = <&dsi_phy0 0>, - <&dsi_phy0 1>; - phys = <&dsi_phy1>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, + <&mdss_dsi0_phy 1>; + phys = <&mdss_dsi1_phy>; status = "disabled"; ports { @@ -1386,20 +1386,20 @@ ports { port@0 { reg = <0>; - dsi1_in: endpoint { - remote-endpoint = <&mdp5_intf2_out>; + mdss_dsi1_in: endpoint { + remote-endpoint = <&mdss_mdp_intf2_out>; }; }; port@1 { reg = <1>; - dsi1_out: endpoint { + mdss_dsi1_out: endpoint { }; }; }; }; - dsi_phy1: phy@1aa0300 { + mdss_dsi1_phy: phy@1aa0300 { compatible = "qcom,dsi-phy-28nm-lp"; reg = <0x01aa0300 0xd4>, <0x01aa0500 0x280>,