Message ID | 20230524152136.1033-1-mario.limonciello@amd.com |
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State | New |
Headers |
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Wysocki" <rafael@kernel.org> CC: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>, "S-k Shyam-sundar" <Shyam-sundar.S-k@amd.com>, Natikar Basavaraj <Basavaraj.Natikar@amd.com>, Deucher Alexander <Alexander.Deucher@amd.com>, <linux-pm@vger.kernel.org>, Lukas Wunner <lukas@wunner.de>, Mario Limonciello <mario.limonciello@amd.com>, Iain Lane <iain@orangesquash.org.uk> Subject: [PATCH v3] PCI: Don't assume root ports from > 2015 are power manageable Date: Wed, 24 May 2023 10:21:36 -0500 Message-ID: <20230524152136.1033-1-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C973:EE_|SJ0PR12MB6902:EE_ X-MS-Office365-Filtering-Correlation-Id: ad197781-c17e-48eb-6328-08db5c6aaa3f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 4/79Siq/efG6Hl8vqDMt/nnE1k0/D5ua61M5n3YoCQ/vxEzKX8WWI4uKHwz7bEMK2uUjasCYzth7TlT8HTgrWSEQc0ZTF2u1VtGF90LZD7RWzEZ74PnCqCF8QdTuIjI1mqZQFshwjEAtdlT6XszBBiZKeaTnYq75fyQMAtAgSWEIpj5JUEqC6029mfVEx+m4VmKUcwlqoGGivB+lqSIv41/yRdaSSHD1GWqshq8h3pfEVdyfdr8Cy8i4oE47W3Nuq0O3Qk/mwGGSr4DI/f/N/2DUndGGfSGbpZ2eh0CouxK1eyCKC4fWhr3Oxo3dfNwb5Mi7zymH7Pj3UuK5FSFTOX90doaGEORbZgww2GFIJf/Ix3yrlxq58897vpW824/yVUMeuIHbtLXN6PloF0l+uSwnDd/IUIrrSPY3re5jwDX2tWZiGaey/V54TDzLhR2mZ15e57xuJvPeZYyeZGsVDT14fZRS5QnMyaNCEDIXyYwQ411K3Vvryx0D3JfChsk/XGdZwRNyZPogweHTT17h+j/g3DyRjkHBHRtMgdoWM+VCl9XmGCeItsYSRbBJzDdYG82l5G8pWc5XQ7qOA8GAgbzY0Vls1jGmiNXpDyESlB5gjcr3HmDtee4Hy2xIqWe+jynRtU+pJ/LzNJxaPmpv7ZYn4vv/L3DQ7XB5kloXuBVD2D2pLnb8GHoXEU6GfqcjhPQmPqcKNvbDWS45d0T+tH2rzG61cBf4uKX8kr0DrTYWldkfzAuJaZ1e0LcUIGgnUUB4RF3sYwpGcth1yo51Vg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(376002)(346002)(136003)(396003)(39860400002)(451199021)(36840700001)(40470700004)(46966006)(54906003)(110136005)(6666004)(26005)(1076003)(70206006)(70586007)(316002)(4326008)(7696005)(41300700001)(966005)(478600001)(8936002)(8676002)(5660300002)(40460700003)(40480700001)(2616005)(83380400001)(86362001)(426003)(336012)(36756003)(2906002)(356005)(82740400003)(81166007)(82310400005)(44832011)(16526019)(186003)(36860700001)(66574015)(47076005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2023 15:22:19.4532 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ad197781-c17e-48eb-6328-08db5c6aaa3f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C973.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6902 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766789812284556712?= X-GMAIL-MSGID: =?utf-8?q?1766789812284556712?= |
Series |
[v3] PCI: Don't assume root ports from > 2015 are power manageable
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Commit Message
Mario Limonciello
May 24, 2023, 3:21 p.m. UTC
Using a USB keyboard or mouse to wakeup the system from s2idle fails when
that XHCI device is connected to a USB-C port for an AMD USB4 router.
Due to commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
all PCIe ports go into D3 during s2idle.
When specific root ports are put into D3 over s2idle on some AMD platforms
it is not possible for the platform to properly identify wakeup sources.
This happens whether the root port goes into D3hot or D3cold.
Comparing registers between Linux and Windows 11 this behavior to put
these specific root ports into D3 at suspend is unique to Linux. On an
affected system Windows does not put those specific root ports into D3
over Modern Standby.
Windows doesn't put the root ports into D3 because root ports are not
power manageable.
Linux shouldn't assume root ports support D3 just because they're on a
machine newer than 2015, the ports should also be deemed power manageable.
Add an extra check explicitly for root ports to ensure D3 isn't selected
for these ports.
Fixes: 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
Reported-by: Iain Lane <iain@orangesquash.org.uk>
Closes: https://forums.lenovo.com/t5/Ubuntu/Z13-can-t-resume-from-suspend-with-external-USB-keyboard/m-p/5217121
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
v2->v3:
* Only apply to root ports
* Update commit message
---
drivers/pci/pci.c | 3 +++
1 file changed, 3 insertions(+)
Comments
On Wed, May 24, 2023 at 10:21:36AM -0500, Mario Limonciello wrote: > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -2976,6 +2976,9 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge) > > switch (pci_pcie_type(bridge)) { > case PCI_EXP_TYPE_ROOT_PORT: > + if (!platform_pci_power_manageable(bridge)) > + return false; > + fallthrough; > case PCI_EXP_TYPE_UPSTREAM: > case PCI_EXP_TYPE_DOWNSTREAM: > if (pci_bridge_d3_disable) This will exempt the Root Ports from pcie_port_pm=force. Not sure if that's desirable. Thanks, Lukas
[AMD Official Use Only - General] > -----Original Message----- > From: Lukas Wunner <lukas@wunner.de> > Sent: Wednesday, May 24, 2023 10:45 AM > To: Limonciello, Mario <Mario.Limonciello@amd.com> > Cc: Bjorn Helgaas <bhelgaas@google.com>; Mika Westerberg > <mika.westerberg@linux.intel.com>; Rafael J . Wysocki <rafael@kernel.org>; > linux-pci@vger.kernel.org; linux-kernel@vger.kernel.org; S-k, Shyam-sundar > <Shyam-sundar.S-k@amd.com>; Natikar, Basavaraj > <Basavaraj.Natikar@amd.com>; Deucher, Alexander > <Alexander.Deucher@amd.com>; linux-pm@vger.kernel.org; Iain Lane > <iain@orangesquash.org.uk> > Subject: Re: [PATCH v3] PCI: Don't assume root ports from > 2015 are power > manageable > > On Wed, May 24, 2023 at 10:21:36AM -0500, Mario Limonciello wrote: > > --- a/drivers/pci/pci.c > > +++ b/drivers/pci/pci.c > > @@ -2976,6 +2976,9 @@ bool pci_bridge_d3_possible(struct pci_dev > *bridge) > > > > switch (pci_pcie_type(bridge)) { > > case PCI_EXP_TYPE_ROOT_PORT: > > + if (!platform_pci_power_manageable(bridge)) > > + return false; > > + fallthrough; > > case PCI_EXP_TYPE_UPSTREAM: > > case PCI_EXP_TYPE_DOWNSTREAM: > > if (pci_bridge_d3_disable) > > This will exempt the Root Ports from pcie_port_pm=force. > Not sure if that's desirable. Right; It will only exempt root ports from pcie_port_pm=force if they aren't power manageable. If it's still desirable to let pcie_port_pm=force work on these I think it's worth refactoring the function otherwise it's going to be a nested if that matches the same variable as the switch. Something like this: bool pci_bridge_d3_possible(struct pci_dev *bridge) { if (!pci_is_pcie(bridge)) return false; switch (pci_pcie_type(bridge)) { case PCI_EXP_TYPE_ROOT_PORT: case PCI_EXP_TYPE_UPSTREAM: case PCI_EXP_TYPE_DOWNSTREAM: break; default: return false; } if (pci_bridge_d3_disable) return false; /* * Hotplug ports handled by firmware in System Management Mode * may not be put into D3 by the OS (Thunderbolt on non-Macs). */ if (bridge->is_hotplug_bridge && !pciehp_is_native(bridge)) return false; if (pci_bridge_d3_force) return true; /* Even the oldest 2010 Thunderbolt controller supports D3. */ if (bridge->is_thunderbolt) return true; /* Platform might know better if the bridge supports D3 */ if (platform_pci_bridge_d3(bridge)) return true; /* * Hotplug ports handled natively by the OS were not validated * by vendors for runtime D3 at least until 2018 because there * was no OS support. */ if (bridge->is_hotplug_bridge) return false; if (dmi_check_system(bridge_d3_blacklist)) return false; /* * It should be safe to put PCIe ports from 2015 or newer * to D3. */ if (dmi_get_bios_year() >= 2015) return true; return false; } Then the check I'm proposing can injected anywhere after the force like this: if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT && !platform_pci_power_manageable(bridge))) return false;
On Wed, May 24, 2023 at 6:16 PM Limonciello, Mario <Mario.Limonciello@amd.com> wrote: > > [AMD Official Use Only - General] > > > -----Original Message----- > > From: Lukas Wunner <lukas@wunner.de> > > Sent: Wednesday, May 24, 2023 10:45 AM > > To: Limonciello, Mario <Mario.Limonciello@amd.com> > > Cc: Bjorn Helgaas <bhelgaas@google.com>; Mika Westerberg > > <mika.westerberg@linux.intel.com>; Rafael J . Wysocki <rafael@kernel.org>; > > linux-pci@vger.kernel.org; linux-kernel@vger.kernel.org; S-k, Shyam-sundar > > <Shyam-sundar.S-k@amd.com>; Natikar, Basavaraj > > <Basavaraj.Natikar@amd.com>; Deucher, Alexander > > <Alexander.Deucher@amd.com>; linux-pm@vger.kernel.org; Iain Lane > > <iain@orangesquash.org.uk> > > Subject: Re: [PATCH v3] PCI: Don't assume root ports from > 2015 are power > > manageable > > > > On Wed, May 24, 2023 at 10:21:36AM -0500, Mario Limonciello wrote: > > > --- a/drivers/pci/pci.c > > > +++ b/drivers/pci/pci.c > > > @@ -2976,6 +2976,9 @@ bool pci_bridge_d3_possible(struct pci_dev > > *bridge) > > > > > > switch (pci_pcie_type(bridge)) { > > > case PCI_EXP_TYPE_ROOT_PORT: > > > + if (!platform_pci_power_manageable(bridge)) > > > + return false; > > > + fallthrough; > > > case PCI_EXP_TYPE_UPSTREAM: > > > case PCI_EXP_TYPE_DOWNSTREAM: > > > if (pci_bridge_d3_disable) > > > > This will exempt the Root Ports from pcie_port_pm=force. > > Not sure if that's desirable. > > Right; It will only exempt root ports from pcie_port_pm=force > if they aren't power manageable. > > If it's still desirable to let pcie_port_pm=force work on these > I think it's worth refactoring the function otherwise it's going > to be a nested if that matches the same variable as the > switch. > > Something like this: > > bool pci_bridge_d3_possible(struct pci_dev *bridge) > { > if (!pci_is_pcie(bridge)) > return false; > > switch (pci_pcie_type(bridge)) { > case PCI_EXP_TYPE_ROOT_PORT: > case PCI_EXP_TYPE_UPSTREAM: > case PCI_EXP_TYPE_DOWNSTREAM: > break; > default: > return false; > } > > if (pci_bridge_d3_disable) > return false; > > /* > * Hotplug ports handled by firmware in System Management Mode > * may not be put into D3 by the OS (Thunderbolt on non-Macs). > */ > if (bridge->is_hotplug_bridge && !pciehp_is_native(bridge)) > return false; > > if (pci_bridge_d3_force) > return true; > > /* Even the oldest 2010 Thunderbolt controller supports D3. */ > if (bridge->is_thunderbolt) > return true; > > /* Platform might know better if the bridge supports D3 */ > if (platform_pci_bridge_d3(bridge)) > return true; > > /* > * Hotplug ports handled natively by the OS were not validated > * by vendors for runtime D3 at least until 2018 because there > * was no OS support. > */ > if (bridge->is_hotplug_bridge) > return false; > > if (dmi_check_system(bridge_d3_blacklist)) > return false; > > /* > * It should be safe to put PCIe ports from 2015 or newer > * to D3. > */ > if (dmi_get_bios_year() >= 2015) > return true; > > return false; > } > > Then the check I'm proposing can injected anywhere after the force like this: > > if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT && > !platform_pci_power_manageable(bridge))) > return false; Sounds reasonable. I would even put it after the Thunderbolt check.
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 5ede93222bc1..51126891a2db 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2976,6 +2976,9 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge) switch (pci_pcie_type(bridge)) { case PCI_EXP_TYPE_ROOT_PORT: + if (!platform_pci_power_manageable(bridge)) + return false; + fallthrough; case PCI_EXP_TYPE_UPSTREAM: case PCI_EXP_TYPE_DOWNSTREAM: if (pci_bridge_d3_disable)