Message ID | 20230524133439.20659-3-runyang.chen@mediatek.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2877904vqo; Wed, 24 May 2023 07:11:01 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ72wBJrrUwvHOyy2o2XKMKqzsJB7YSD4md7eSoS6yM1MM+90j/cPRRF05bWis24R49cthl6 X-Received: by 2002:a05:6a20:7d9a:b0:10c:7a20:6dd6 with SMTP id v26-20020a056a207d9a00b0010c7a206dd6mr6774149pzj.42.1684937461009; Wed, 24 May 2023 07:11:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684937460; cv=none; d=google.com; s=arc-20160816; b=AovbFdUNGRqS+YAAm5SH5fFASyZZsAi9tWoT1OmhO3SLKqTFxmCTJFAzgF1wMYTXNM dZdiN9NllpR60nP/ra9OryJO2xDoFnAwIvKmioJODaCk8Tyynu6ogHM23cVOrASEfVVN CeESCaJYmOXwAsstD/Koy6Z/R9pCpeWOC6hR7tt1FgXj/K57MOw97wKo2jY7LxkK/HqJ FIcqN5CHJe56UqjJylknoIBJVOIax2/tsdZsHAlOSFBAe4OaCLB3iPSKZ96RbOrqFtUS XqUFv7mpWEfv7SRt+nKnqkX+c/GjvfquBk/FYYL8ovh0mxuqmcLBMYYB3kCiEVlzX5/7 EY6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=M2a6rGpawYtAjbZDZaYZUA6WdMNG+Ygqo1pPcfyzz00=; b=UAD34RGN7bevBiOMowMsI/24hRdZG2Yod2pm26NGrTHBhq8DRx4HAozMtKlJ6KMIYO +xo8WtTDk+VCVdZ/MS4YDW9PtIowKQy558CCsD2GWI4936n11zhEClFYlvGFpF5p2/bl BjBEXXvM5M1vXKv8nyL0XYQ+6cVIDCxLsrY2WXqU1EpS8eCs0LBd6gkWFbG4QHvT7deu LVNAwB9bQ1LZF+hSZlhyGsPCTS/T2pNrdfvzW1u2tpLj3kRhVGiBnVpsXW8QUbXPfk0W L3hvOCgFbR+QC2sq7Ks64l/aDIFj/Bj9pYZ3kmwBV/3BTyhN2r4SaxYFDO/UysuYB1a1 AD4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=PSf+wVWe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a13-20020a63704d000000b0052c6e736acbsi4420063pgn.333.2023.05.24.07.10.47; Wed, 24 May 2023 07:11:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=PSf+wVWe; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234734AbjEXNfC (ORCPT <rfc822;ahmedalshaiji.dev@gmail.com> + 99 others); Wed, 24 May 2023 09:35:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234687AbjEXNe4 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 24 May 2023 09:34:56 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD711A9; Wed, 24 May 2023 06:34:53 -0700 (PDT) X-UUID: c1642426fa3711edb20a276fd37b9834-20230524 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=M2a6rGpawYtAjbZDZaYZUA6WdMNG+Ygqo1pPcfyzz00=; b=PSf+wVWeL56hZv0l9Co/Bof7OZN/mXd5xwNPkjJLpJUFWGMXRlPmn1wEEH/pieIzd3PMhGndUe7ht1R+0VyKoHIaYCJdor7XdImZSRmlpmpLJoCJRJjhbMVSyPb1+GSz4aDpGKchRD6Wf972Fywk4FqAgLPKcSK0tQbTowduYU4=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.25,REQID:9fdd8688-ef9f-4a5b-bfc5-3f4abd4a81e3,IP:0,U RL:0,TC:0,Content:-5,EDM:-30,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:-35 X-CID-META: VersionHash:d5b0ae3,CLOUDID:fa1ce7c1-e32c-4c97-918d-fbb3fc224d4e,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:2,IP:nil,UR L:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-UUID: c1642426fa3711edb20a276fd37b9834-20230524 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from <runyang.chen@mediatek.com>) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 915258689; Wed, 24 May 2023 21:34:49 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 24 May 2023 21:34:48 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 24 May 2023 21:34:47 +0800 From: Runyang Chen <runyang.chen@mediatek.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, Philipp Zabel <p.zabel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> CC: <linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <devicetree@vger.kernel.org>, Runyang Chen <runyang.chen@mediatek.com> Subject: [PATCH v3 2/2] clk: mediatek: reset: add infra_ao reset support for MT8188 Date: Wed, 24 May 2023 21:34:39 +0800 Message-ID: <20230524133439.20659-3-runyang.chen@mediatek.com> X-Mailer: git-send-email 2.9.2 In-Reply-To: <20230524133439.20659-1-runyang.chen@mediatek.com> References: <20230524133439.20659-1-runyang.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766784982977522275?= X-GMAIL-MSGID: =?utf-8?q?1766784982977522275?= |
Series |
Add infra_ao reset support for MT8188 Soc
|
|
Commit Message
Runyang Chen
May 24, 2023, 1:34 p.m. UTC
The infra_ao reset is needed for MT8188.
- Add mtk_clk_rst_desc for MT8188.
- Add register reset controller function for MT8188 infra_ao.
- Add infra_ao_idx_map for MT8188.
Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
---
drivers/clk/mediatek/clk-mt8188-infra_ao.c | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
Comments
Hi Runyang, kernel test robot noticed the following build warnings: [auto build test WARNING on clk/clk-next] [also build test WARNING on pza/reset/next linus/master v6.4-rc3 next-20230524] [cannot apply to pza/imx-drm/next mbgg-mediatek/for-next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Runyang-Chen/dt-bindings-reset-mt8188-add-thermal-reset-control-bit/20230524-213538 base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next patch link: https://lore.kernel.org/r/20230524133439.20659-3-runyang.chen%40mediatek.com patch subject: [PATCH v3 2/2] clk: mediatek: reset: add infra_ao reset support for MT8188 config: m68k-allyesconfig compiler: m68k-linux-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): mkdir -p ~/bin wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/7d969d160489d561f9b1fb6388adaa1ba8fe06a1 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Runyang-Chen/dt-bindings-reset-mt8188-add-thermal-reset-control-bit/20230524-213538 git checkout 7d969d160489d561f9b1fb6388adaa1ba8fe06a1 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 ~/bin/make.cross W=1 O=build_dir ARCH=m68k olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 ~/bin/make.cross W=1 O=build_dir ARCH=m68k SHELL=/bin/bash drivers/clk/ If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202305242320.AZzmINEa-lkp@intel.com/ All warnings (new ones prefixed by >>): >> drivers/clk/mediatek/clk-mt8188-infra_ao.c:196:25: warning: initialization discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] 196 | .rst_bank_ofs = infra_ao_rst_ofs, | ^~~~~~~~~~~~~~~~ drivers/clk/mediatek/clk-mt8188-infra_ao.c:198:24: warning: initialization discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] 198 | .rst_idx_map = infra_ao_idx_map, | ^~~~~~~~~~~~~~~~ vim +/const +196 drivers/clk/mediatek/clk-mt8188-infra_ao.c 193 194 static const struct mtk_clk_rst_desc infra_ao_rst_desc = { 195 .version = MTK_RST_SET_CLR, > 196 .rst_bank_ofs = infra_ao_rst_ofs, 197 .rst_bank_nr = ARRAY_SIZE(infra_ao_rst_ofs), 198 .rst_idx_map = infra_ao_idx_map, 199 .rst_idx_map_nr = ARRAY_SIZE(infra_ao_idx_map), 200 }; 201
Hi Runyang, kernel test robot noticed the following build errors: [auto build test ERROR on clk/clk-next] [also build test ERROR on pza/reset/next] [cannot apply to pza/imx-drm/next mbgg-mediatek/for-next] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Runyang-Chen/dt-bindings-reset-mt8188-add-thermal-reset-control-bit/20230524-213538 base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next patch link: https://lore.kernel.org/r/20230524133439.20659-3-runyang.chen%40mediatek.com patch subject: [PATCH v3 2/2] clk: mediatek: reset: add infra_ao reset support for MT8188 config: riscv-randconfig-r042-20230524 (https://download.01.org/0day-ci/archive/20230525/202305250908.Uvas9u4E-lkp@intel.com/config) compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project 4faf3aaf28226a4e950c103a14f6fc1d1fdabb1b) reproduce (this is a W=1 build): mkdir -p ~/bin wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install riscv cross compiling tool for clang build # apt-get install binutils-riscv64-linux-gnu # https://github.com/intel-lab-lkp/linux/commit/7d969d160489d561f9b1fb6388adaa1ba8fe06a1 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Runyang-Chen/dt-bindings-reset-mt8188-add-thermal-reset-control-bit/20230524-213538 git checkout 7d969d160489d561f9b1fb6388adaa1ba8fe06a1 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang ~/bin/make.cross W=1 O=build_dir ARCH=riscv olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang ~/bin/make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash drivers/clk/mediatek/ If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202305250908.Uvas9u4E-lkp@intel.com/ All errors (new ones prefixed by >>): >> drivers/clk/mediatek/clk-mt8188-infra_ao.c:196:18: error: initializing 'u16 *' (aka 'unsigned short *') with an expression of type 'const u16[5]' (aka 'const unsigned short[5]') discards qualifiers [-Werror,-Wincompatible-pointer-types-discards-qualifiers] .rst_bank_ofs = infra_ao_rst_ofs, ^~~~~~~~~~~~~~~~ drivers/clk/mediatek/clk-mt8188-infra_ao.c:198:17: error: initializing 'u16 *' (aka 'unsigned short *') with an expression of type 'const u16[3]' (aka 'const unsigned short[3]') discards qualifiers [-Werror,-Wincompatible-pointer-types-discards-qualifiers] .rst_idx_map = infra_ao_idx_map, ^~~~~~~~~~~~~~~~ 2 errors generated. vim +196 drivers/clk/mediatek/clk-mt8188-infra_ao.c 193 194 static const struct mtk_clk_rst_desc infra_ao_rst_desc = { 195 .version = MTK_RST_SET_CLR, > 196 .rst_bank_ofs = infra_ao_rst_ofs, 197 .rst_bank_nr = ARRAY_SIZE(infra_ao_rst_ofs), 198 .rst_idx_map = infra_ao_idx_map, 199 .rst_idx_map_nr = ARRAY_SIZE(infra_ao_idx_map), 200 }; 201
diff --git a/drivers/clk/mediatek/clk-mt8188-infra_ao.c b/drivers/clk/mediatek/clk-mt8188-infra_ao.c index a38ddc7b6a88..bb53e92144c2 100644 --- a/drivers/clk/mediatek/clk-mt8188-infra_ao.c +++ b/drivers/clk/mediatek/clk-mt8188-infra_ao.c @@ -5,6 +5,7 @@ */ #include <dt-bindings/clock/mediatek,mt8188-clk.h> +#include <dt-bindings/reset/mt8188-resets.h> #include <linux/clk-provider.h> #include <linux/platform_device.h> @@ -176,9 +177,32 @@ static const struct mtk_gate infra_ao_clks[] = { "infra_ao_aes_msdcfde_0p", "top_aes_msdcfde", 18), }; +static const u16 infra_ao_rst_ofs[] = { + INFRA_RST0_SET_OFFSET, + INFRA_RST1_SET_OFFSET, + INFRA_RST2_SET_OFFSET, + INFRA_RST3_SET_OFFSET, + INFRA_RST4_SET_OFFSET, +}; + +static const u16 infra_ao_idx_map[] = { + [MT8188_INFRA_RST1_THERMAL_MCU_RST] = 1 * RST_NR_PER_BANK + 2, + [MT8188_INFRA_RST1_THERMAL_CTRL_RST] = 1 * RST_NR_PER_BANK + 4, + [MT8188_INFRA_RST3_PTP_CTRL_RST] = 3 * RST_NR_PER_BANK + 5, +}; + +static const struct mtk_clk_rst_desc infra_ao_rst_desc = { + .version = MTK_RST_SET_CLR, + .rst_bank_ofs = infra_ao_rst_ofs, + .rst_bank_nr = ARRAY_SIZE(infra_ao_rst_ofs), + .rst_idx_map = infra_ao_idx_map, + .rst_idx_map_nr = ARRAY_SIZE(infra_ao_idx_map), +}; + static const struct mtk_clk_desc infra_ao_desc = { .clks = infra_ao_clks, .num_clks = ARRAY_SIZE(infra_ao_clks), + .rst_desc = &infra_ao_rst_desc, }; static const struct of_device_id of_match_clk_mt8188_infra_ao[] = {