From patchwork Sat May 20 05:08:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cai Huoqing X-Patchwork-Id: 96724 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp150118vqo; Fri, 19 May 2023 22:10:32 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ72ubXtXghvE9OyOjLZKwjkdieScsz98TSJNwMAdGIR7lOOSCwTHCf5Gi/IQUmmOtrfCiXD X-Received: by 2002:a17:902:daca:b0:1ac:859a:5b5a with SMTP id q10-20020a170902daca00b001ac859a5b5amr6328581plx.0.1684559432423; Fri, 19 May 2023 22:10:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684559432; cv=none; d=google.com; s=arc-20160816; b=hOmTUq6DppLO3YRbWGgn9gmjqAxwWPvkrSF2IeJtJaK7munkQuvUt6sKH5g8vmfToF GigdVmm2uHSFyhtXSj5I6SajmHItQHFiJSzVyaxrxanFgtZU8XEX3FJ/HxEXlpNJizL4 mjCsSNhX9lYSAfBHeUUHvA+rxe6Joh9MVbJnsj3lyKU10G4MeBXvsbJaBkGvYmi5wjO7 iXuWldd78Yy9zfEgy1ewMUUMKfVEQu3hhXCbu/LHzfRJz7OusXFnLIMMFiymld+5v8Q9 Ze007Z/NNpYmrdL9L1C5xKush4paJstWUIaIHXP2CWRQ9I6R29v/M/6LBGFY2+gNfeEJ OOFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2qf7ZKU+F/sduxe5n82SDsJq91Yvzlyx21uz5733CS0=; b=v+zrwvXykOTO6mckxghF6fg21wdT2lJDLOIBPCyhbHhLQeefYHS9YvtJlxT1bl0OUI 7fFi9KMcaeXAxjLrejL91mUtfzdWoxXUQMdzuuhym81fhTXMet2UalGFX9UhZ0E9u3T4 CoQYmfGjzHx6TJkc+5YHy5t1XeTPyXzL5QjLdwWKHpgPIuAS6MKE4l6W/WiRRWTw1Q9x bT5mzfmbhR9pZ4tmGwu+BB6VHpiSmWJhB3U9b8pa7L0GMWF14HV42kByULWnHyA3IAP+ 334yb8ZGnprJb7cglJOlv5cCTwZR7Q3PHd21zvtCSFl1gHQYFiT22vBeEAPr0/m44un2 UOUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linux.dev header.s=key1 header.b=seGBJA02; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linux.dev Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 4-20020a170902c24400b001a92875cda9si720811plg.288.2023.05.19.22.10.17; Fri, 19 May 2023 22:10:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linux.dev header.s=key1 header.b=seGBJA02; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linux.dev Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230389AbjETFJS (ORCPT + 99 others); Sat, 20 May 2023 01:09:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230262AbjETFJM (ORCPT ); Sat, 20 May 2023 01:09:12 -0400 Received: from out-29.mta1.migadu.com (out-29.mta1.migadu.com [95.215.58.29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F1B8E3 for ; Fri, 19 May 2023 22:09:09 -0700 (PDT) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1684559347; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2qf7ZKU+F/sduxe5n82SDsJq91Yvzlyx21uz5733CS0=; b=seGBJA021agkLITt/efxJYy4d/37WKMt7rvWAhC8lfL5xr3G+uPxrJoZjA8foKU/TQgVhS PdBlbhS6vaETMxSSaE1bU60k2Qb1vy8wYQZlsVqzfbC06wttENKe6pMcd1CQ3pDrg6JPGA 4FdLnHfdqc9HCpaPQ7DA6YA/yE1aMo0= From: Cai Huoqing To: vkoul@kernel.org Cc: Cai Huoqing , Serge Semin , Manivannan Sadhasivam , Manivannan Sadhasivam , Gustavo Pimentel , Jingoo Han , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v11 1/4] dmaengine: dw-edma: Rename dw_edma_core_ops structure to dw_edma_plat_ops Date: Sat, 20 May 2023 13:08:49 +0800 Message-Id: <20230520050854.73160-2-cai.huoqing@linux.dev> In-Reply-To: <20230520050854.73160-1-cai.huoqing@linux.dev> References: <20230520050854.73160-1-cai.huoqing@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766388591566678700?= X-GMAIL-MSGID: =?utf-8?q?1766388591566678700?= The dw_edma_core_ops structure contains a set of the operations: device IRQ numbers getter, CPU/PCI address translation. Based on the functions semantics the structure name "dw_edma_plat_ops" looks more descriptive since indeed the operations are platform-specific. The "dw_edma_core_ops" name shall be used for a structure with the IP-core specific set of callbacks in order to abstract out DW eDMA and DW HDMA setups. Such structure will be added in one of the next commit in the framework of the set of changes adding the DW HDMA device support. Anyway the renaming was necessary to distinguish two types of the implementation callbacks: 1. DW eDMA/hDMA IP-core specific operations: device-specific CSR setups in one or another aspect of the DMA-engine initialization. 2. DW eDMA/hDMA platform specific operations: the DMA device environment configs like IRQs, address translation, etc. Signed-off-by: Cai Huoqing Reviewed-by: Serge Semin Reviewed-by: Manivannan Sadhasivam Tested-by: Serge Semin --- v10->v11: Using single name in commit log. v10 link: https://lore.kernel.org/lkml/20230517030115.21093-2-cai.huoqing@linux.dev/ drivers/dma/dw-edma/dw-edma-pcie.c | 4 ++-- drivers/pci/controller/dwc/pcie-designware.c | 2 +- include/linux/dma/edma.h | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c index 2b40f2b44f5e..1c6043751dc9 100644 --- a/drivers/dma/dw-edma/dw-edma-pcie.c +++ b/drivers/dma/dw-edma/dw-edma-pcie.c @@ -109,7 +109,7 @@ static u64 dw_edma_pcie_address(struct device *dev, phys_addr_t cpu_addr) return region.start; } -static const struct dw_edma_core_ops dw_edma_pcie_core_ops = { +static const struct dw_edma_plat_ops dw_edma_pcie_plat_ops = { .irq_vector = dw_edma_pcie_irq_vector, .pci_address = dw_edma_pcie_address, }; @@ -225,7 +225,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev, chip->mf = vsec_data.mf; chip->nr_irqs = nr_irqs; - chip->ops = &dw_edma_pcie_core_ops; + chip->ops = &dw_edma_pcie_plat_ops; chip->ll_wr_cnt = vsec_data.wr_ch_cnt; chip->ll_rd_cnt = vsec_data.rd_ch_cnt; diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 8e33e6e59e68..1f2ee71da4da 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -828,7 +828,7 @@ static int dw_pcie_edma_irq_vector(struct device *dev, unsigned int nr) return platform_get_irq_byname_optional(pdev, name); } -static struct dw_edma_core_ops dw_pcie_edma_ops = { +static struct dw_edma_plat_ops dw_pcie_edma_ops = { .irq_vector = dw_pcie_edma_irq_vector, }; diff --git a/include/linux/dma/edma.h b/include/linux/dma/edma.h index d2638d9259dc..ed401c965a87 100644 --- a/include/linux/dma/edma.h +++ b/include/linux/dma/edma.h @@ -40,7 +40,7 @@ struct dw_edma_region { * iATU windows. That will be done by the controller * automatically. */ -struct dw_edma_core_ops { +struct dw_edma_plat_ops { int (*irq_vector)(struct device *dev, unsigned int nr); u64 (*pci_address)(struct device *dev, phys_addr_t cpu_addr); }; @@ -80,7 +80,7 @@ enum dw_edma_chip_flags { struct dw_edma_chip { struct device *dev; int nr_irqs; - const struct dw_edma_core_ops *ops; + const struct dw_edma_plat_ops *ops; u32 flags; void __iomem *reg_base;