diff mbox series

[v2,8/9] MAINTAINERS: add entry for T-HEAD RISC-V SoC

Message ID	20230518184541.2627-9-jszhang@kernel.org
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; From: Jisheng Zhang <jszhang@kernel.org> To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Guo Ren <guoren@kernel.org> Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Yangtao Li <frank.li@vivo.com>, Wei Fu <wefu@redhat.com>, Icenowy Zheng <uwu@icenowy.me> Subject: [PATCH v2 8/9] MAINTAINERS: add entry for T-HEAD RISC-V SoC Date: Fri, 19 May 2023 02:45:40 +0800 Message-Id: <20230518184541.2627-9-jszhang@kernel.org> In-Reply-To: <20230518184541.2627-1-jszhang@kernel.org> References: <20230518184541.2627-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Add Sipeed Lichee Pi 4A RISC-V board support \| [v2,0/9] Add Sipeed Lichee Pi 4A RISC-V board support [v2,1/9] dt-bindings: interrupt-controller: Add T-HEAD's TH1520 PLIC [v2,2/9] dt-bindings: timer: Add T-HEAD TH1520 clint [v2,3/9] dt-bindings: riscv: Add T-HEAD TH1520 board compatibles [v2,4/9] dt-binding: riscv: add T-HEAD CPU reset [v2,5/9] riscv: Add the T-HEAD SoC family Kconfig option [v2,6/9] riscv: dts: add initial T-HEAD TH1520 SoC device tree [v2,7/9] riscv: dts: thead: add sipeed Lichee Pi 4A board device tree [v2,8/9] MAINTAINERS: add entry for T-HEAD RISC-V SoC [v2,9/9] riscv: defconfig: enable T-HEAD SoC

Commit Message

Jisheng Zhang May 18, 2023, 6:45 p.m. UTC

  Currently, I would like to maintain the T-HEAD RISC-V SoC support.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 MAINTAINERS | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Conor Dooley May 18, 2023, 8:57 p.m. UTC | #1

On Fri, May 19, 2023 at 02:45:40AM +0800, Jisheng Zhang wrote:
> Currently, I would like to maintain the T-HEAD RISC-V SoC support.
> 
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> ---
>  MAINTAINERS | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index e0ad886d3163..6df20c65798a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -18162,6 +18162,12 @@ F:	drivers/perf/riscv_pmu.c
>  F:	drivers/perf/riscv_pmu_legacy.c
>  F:	drivers/perf/riscv_pmu_sbi.c
>  
> +RISC-V THEAD SoC SUPPORT
> +M:	Jisheng Zhang <jszhang@kernel.org>
> +L:	linux-riscv@lists.infradead.org
> +S:	Maintained
> +F:	arch/riscv/boot/dts/thead/
> +
>  RNBD BLOCK DRIVERS
>  M:	Md. Haris Iqbal <haris.iqbal@ionos.com>
>  M:	Jack Wang <jinpu.wang@ionos.com>
> -- 
> 2.40.0
>

diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index e0ad886d3163..6df20c65798a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -18162,6 +18162,12 @@  F:	drivers/perf/riscv_pmu.c
 F:	drivers/perf/riscv_pmu_legacy.c
 F:	drivers/perf/riscv_pmu_sbi.c
 
+RISC-V THEAD SoC SUPPORT
+M:	Jisheng Zhang <jszhang@kernel.org>
+L:	linux-riscv@lists.infradead.org
+S:	Maintained
+F:	arch/riscv/boot/dts/thead/
+
 RNBD BLOCK DRIVERS
 M:	Md. Haris Iqbal <haris.iqbal@ionos.com>
 M:	Jack Wang <jinpu.wang@ionos.com>