From patchwork Thu May 18 13:09:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guo Ren X-Patchwork-Id: 95871 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp491047vqo; Thu, 18 May 2023 06:26:01 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ50eoV4iWGCKexE+xLBQuI0wKlv+fAxX8nJknq3rCFrPEJgKNDv6jQ84U7NkJr9pzvDrD8Z X-Received: by 2002:a17:903:41cf:b0:1ad:f7d9:1ae2 with SMTP id u15-20020a17090341cf00b001adf7d91ae2mr3015625ple.55.1684416359771; Thu, 18 May 2023 06:25:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684416359; cv=none; d=google.com; s=arc-20160816; b=qQfwsk0f2TYoXNLBoVK6CWcP39vbxxFMjv1Ocz7z5weNC+d1nJoq8LJrri0HbP1yYX WTYcI680727vcH2oPtjd/EfhAMltrVQ9NYVRjZVOWnmuragIHqdnWXASnlbxB0ZxOfR8 m1A2RypumoAtv2RA21+uHaDaiEqHpLFKi/yAXuA8PA0JaHA/uKYU2oP28jBb4Q+kgDy2 EJUAXFG3ibb4eiiWoBwRDopa9D0ptW1daJplDmCo0bLE0CJd5d4Ebo6oEBvnQ8MSOWP+ lPsyr1mlTmActnPnX8yFRbCyfR8w5kFG07zn443PR61Hg+dL9OTw17o3+bEhJM03g3qe 15Qg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mqc/1Bm2NHS24V/w4AauBxe3IH5itWz9iHBKfTNN8Fw=; b=TX9vVmX2qaBxAJ6LSUovbzpGYBPWm5DBSDJGzn3/8UaVlKe70O5+0oAx7kJ9uH/bpf UDFY/YK93G8cBfLjFlYtQQhwOSQvkTwpM3w42Jqo0ShsdaApvvHQxSnIwygl2FUM3cFS TNq9gHspMvJxb4f1BxLSnc0SMfgF18801dFM+M4kRPsgDHwHvuAUFpsrbRX1/CbNDTOb AIYHieOyxpxIhbJZNOHgi0E1kQ89066itaWQ3HXYWr8+WAIk+p93Buzf25fAbUAJeL4D iLI3mhYeCRQ2HL8dW8T16PSf60Sc2PRmGGvniDkDVUTeB5JrUZvAMxLyz90Er/HHPIsK VbVA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=PF1LX07A; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z11-20020a170903018b00b001a24521e826si1431201plg.61.2023.05.18.06.25.44; Thu, 18 May 2023 06:25:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=PF1LX07A; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231636AbjERNNs (ORCPT + 99 others); Thu, 18 May 2023 09:13:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231523AbjERNNY (ORCPT ); Thu, 18 May 2023 09:13:24 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 343E71BFB; Thu, 18 May 2023 06:12:52 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4996364F4D; Thu, 18 May 2023 13:11:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 25509C433D2; Thu, 18 May 2023 13:11:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1684415515; bh=H3qRrc+Swbkb9xjGRDiBZp2YLKEOjr9L7yAe3XbxQAc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PF1LX07AYPEcI1S34Swg/YAvpiv/8q+1WM0ePfVK4OiIFzXg9ryk5cdpN0hr51Y2p ji+YyEyhIpKdPWIJ1YqPhMNdE3hwVfa7gWZSTEifU5EK/QQo6amzN+jKuZRzBhYvSt OclNJkPp9AuOtK3MmSe1Dm1QBrZWW/7H/TL7xJOhKh6HvtqOUx+gDIy1I83AZpCUSF gRtVcmz/smsNoZdXJ/GvB591xYetaY0ca5qgLImxoJ+pay7S3KHQlcnFGwnDgHbOWi tCcQNQIEGCF4BC5FlLlCwFHEh37zARMkRlbPbpQYmKlvwz11rN3xqVOm0pmUAZtNIB jKlCjJMI5Bv3Q== From: guoren@kernel.org To: arnd@arndb.de, guoren@kernel.org, palmer@rivosinc.com, tglx@linutronix.de, peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, mark.rutland@arm.com, bjorn@kernel.org, paul.walmsley@sifive.com, catalin.marinas@arm.com, will@kernel.org, rppt@kernel.org, anup@brainfault.org, shihua@iscas.ac.cn, jiawei@iscas.ac.cn, liweiwei@iscas.ac.cn, luxufan@iscas.ac.cn, chunyu@iscas.ac.cn, tsu.yubo@gmail.com, wefu@redhat.com, wangjunqiang@iscas.ac.cn, kito.cheng@sifive.com, andy.chiu@sifive.com, vincent.chen@sifive.com, greentime.hu@sifive.com, corbet@lwn.net, wuwei2016@iscas.ac.cn, jrtc27@jrtc27.com Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren Subject: [RFC PATCH 06/22] irqchip: riscv: s64ilp32: Use __riscv_xlen instead of CONFIG_32BIT Date: Thu, 18 May 2023 09:09:57 -0400 Message-Id: <20230518131013.3366406-7-guoren@kernel.org> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230518131013.3366406-1-guoren@kernel.org> References: <20230518131013.3366406-1-guoren@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766238569007585000?= X-GMAIL-MSGID: =?utf-8?q?1766238569007585000?= From: Guo Ren When s64ilp32 enabled, CONFIG_32BIT=y but __riscv_xlen=64. So we must use __riscv_xlen to detect real machine XLEN for CSR access. Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- drivers/irqchip/irq-riscv-intc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index 499e5f81b3fe..18f3c837e488 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -21,7 +21,7 @@ static struct irq_domain *intc_domain; static asmlinkage void riscv_intc_irq(struct pt_regs *regs) { - unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG; + xlen_t cause = regs->cause & ~CAUSE_IRQ_FLAG; if (unlikely(cause >= BITS_PER_LONG)) panic("unexpected interrupt cause"); @@ -113,7 +113,7 @@ static int __init riscv_intc_init(struct device_node *node, if (riscv_hartid_to_cpuid(hartid) != smp_processor_id()) return 0; - intc_domain = irq_domain_add_linear(node, BITS_PER_LONG, + intc_domain = irq_domain_add_linear(node, __riscv_xlen, &riscv_intc_domain_ops, NULL); if (!intc_domain) { pr_err("unable to add IRQ domain\n");