Message ID | 20230518115258.14320-1-shuijing.li@mediatek.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 19-20020a631753000000b00518b499da59si1085857pgx.901.2023.05.18.05.12.32; Thu, 18 May 2023 05:12:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=nxxy1D0e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230385AbjERLxC (ORCPT <rfc822;cscallsign@gmail.com> + 99 others); Thu, 18 May 2023 07:53:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46026 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231358AbjERLw7 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 18 May 2023 07:52:59 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E14E5C3; Thu, 18 May 2023 04:52:52 -0700 (PDT) X-UUID: 80d980e6f57211edb20a276fd37b9834-20230518 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=AswqjqlgL9AGh9p9nkxsoOkIsJN0FnFVHRTAlCMqEfI=; b=nxxy1D0eQMPaaOL6Ke3UNqTSmKbMdVUv7Fx9d7oxdZMzKjorb6RCbf+lFIJbv44fx03yqFfY9Yfz26+UiiKLJvCHPdpPSRYRQJBTsAbLbtQFc90SqfkDLzLF0RZn3BzJzbpLkkga8TkEbulqr9VF9apOqilfeJjy3ZDutxit/C0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.25,REQID:89b454fa-6434-4859-b600-62d732cb1080,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.25,REQID:89b454fa-6434-4859-b600-62d732cb1080,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:d5b0ae3,CLOUDID:f063993b-de1e-4348-bc35-c96f92f1dcbb,B ulkID:230518195247SR3GV0C6,BulkQuantity:0,Recheck:0,SF:19|48|38|29|28|17,T C:nil,Content:0,EDM:-3,IP:nil,URL:1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-UUID: 80d980e6f57211edb20a276fd37b9834-20230518 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from <shuijing.li@mediatek.com>) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1171412908; Thu, 18 May 2023 19:52:45 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.194) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 18 May 2023 19:52:36 +0800 Received: from mszsdhlt06.gcn.mediatek.inc (10.16.6.206) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 18 May 2023 19:52:35 +0800 From: Shuijing Li <shuijing.li@mediatek.com> To: <thierry.reding@gmail.com>, <u.kleine-koenig@pengutronix.de>, <matthias.bgg@gmail.com>, <angelogioacchino.delregno@collabora.com> CC: <devicetree@vger.kernel.org>, <linux-pwm@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <Project_Global_Chrome_Upstream_Group@mediatek.com>, <jitao.shi@mediatek.com>, Shuijing Li <shuijing.li@mediatek.com> Subject: [PATCH v2] pwm: mtk_disp: Fix the disable flow of disp_pwm Date: Thu, 18 May 2023 19:52:58 +0800 Message-ID: <20230518115258.14320-1-shuijing.li@mediatek.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766233963695125334?= X-GMAIL-MSGID: =?utf-8?q?1766233963695125334?= |
Series |
[v2] pwm: mtk_disp: Fix the disable flow of disp_pwm
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Commit Message
Shuijing Li
May 18, 2023, 11:52 a.m. UTC
There is a flow error in the original mtk_disp_pwm_apply() function.
If this function is called when the clock is disabled, there will be a
chance to operate the disp_pwm register, resulting in disp_pwm exception.
Fix this accordingly.
Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
---
Changes in v2:
Use
if (A && B) {
something();
}
instead of
if (A) {
if (B) {
something();
}
}
per suggestion from the previous thread:
https://lore.kernel.org/lkml/20230515140346.bxeu6xewi6a446nd@pengutronix.de/
---
drivers/pwm/pwm-mtk-disp.c | 13 +++++--------
1 file changed, 5 insertions(+), 8 deletions(-)
Comments
On 18/05/2023 13:52, Shuijing Li wrote: > There is a flow error in the original mtk_disp_pwm_apply() function. > If this function is called when the clock is disabled, there will be a > chance to operate the disp_pwm register, resulting in disp_pwm exception. > Fix this accordingly. > > Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> We are missing a fixes tag here. Fixes: 888a623db5d0 ("pwm: mtk-disp: Implement atomic API .apply()") with that: Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> > --- > Changes in v2: > Use > if (A && B) { > something(); > } > instead of > if (A) { > if (B) { > something(); > } > } > per suggestion from the previous thread: > https://lore.kernel.org/lkml/20230515140346.bxeu6xewi6a446nd@pengutronix.de/ > --- > drivers/pwm/pwm-mtk-disp.c | 13 +++++-------- > 1 file changed, 5 insertions(+), 8 deletions(-) > > diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c > index 79e321e96f56..2401b6733241 100644 > --- a/drivers/pwm/pwm-mtk-disp.c > +++ b/drivers/pwm/pwm-mtk-disp.c > @@ -79,14 +79,11 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, > if (state->polarity != PWM_POLARITY_NORMAL) > return -EINVAL; > > - if (!state->enabled) { > - mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, mdp->data->enable_mask, > - 0x0); > - > - if (mdp->enabled) { > - clk_disable_unprepare(mdp->clk_mm); > - clk_disable_unprepare(mdp->clk_main); > - } > + if (!state->enabled && mdp->enabled) { > + mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, > + mdp->data->enable_mask, 0x0); > + clk_disable_unprepare(mdp->clk_mm); > + clk_disable_unprepare(mdp->clk_main); > > mdp->enabled = false; > return 0;
On Mon, May 29, 2023 at 6:43 PM Matthias Brugger <matthias.bgg@gmail.com> wrote: > > > > On 18/05/2023 13:52, Shuijing Li wrote: > > There is a flow error in the original mtk_disp_pwm_apply() function. > > If this function is called when the clock is disabled, there will be a > > chance to operate the disp_pwm register, resulting in disp_pwm exception. > > Fix this accordingly. > > > > Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> > > We are missing a fixes tag here. > Fixes: 888a623db5d0 ("pwm: mtk-disp: Implement atomic API .apply()") > > > with that: > Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Tested-by: Fei Shao <fshao@chromium.org> > > > --- > > Changes in v2: > > Use > > if (A && B) { > > something(); > > } > > instead of > > if (A) { > > if (B) { > > something(); > > } > > } > > per suggestion from the previous thread: > > https://lore.kernel.org/lkml/20230515140346.bxeu6xewi6a446nd@pengutronix.de/ > > --- > > drivers/pwm/pwm-mtk-disp.c | 13 +++++-------- > > 1 file changed, 5 insertions(+), 8 deletions(-) > > > > diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c > > index 79e321e96f56..2401b6733241 100644 > > --- a/drivers/pwm/pwm-mtk-disp.c > > +++ b/drivers/pwm/pwm-mtk-disp.c > > @@ -79,14 +79,11 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, > > if (state->polarity != PWM_POLARITY_NORMAL) > > return -EINVAL; > > > > - if (!state->enabled) { > > - mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, mdp->data->enable_mask, > > - 0x0); > > - > > - if (mdp->enabled) { > > - clk_disable_unprepare(mdp->clk_mm); > > - clk_disable_unprepare(mdp->clk_main); > > - } > > + if (!state->enabled && mdp->enabled) { > > + mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, > > + mdp->data->enable_mask, 0x0); > > + clk_disable_unprepare(mdp->clk_mm); > > + clk_disable_unprepare(mdp->clk_main); > > > > mdp->enabled = false; > > return 0; >
On Thu, May 18, 2023 at 07:52:58PM +0800, Shuijing Li wrote: > There is a flow error in the original mtk_disp_pwm_apply() function. > If this function is called when the clock is disabled, there will be a > chance to operate the disp_pwm register, resulting in disp_pwm exception. > Fix this accordingly. > > Signed-off-by: Shuijing Li <shuijing.li@mediatek.com> Acked-by: Uwe Kleine-König <u.kleine-kleine@pengutronix.de> Best regards Uwe
diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c index 79e321e96f56..2401b6733241 100644 --- a/drivers/pwm/pwm-mtk-disp.c +++ b/drivers/pwm/pwm-mtk-disp.c @@ -79,14 +79,11 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (state->polarity != PWM_POLARITY_NORMAL) return -EINVAL; - if (!state->enabled) { - mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, mdp->data->enable_mask, - 0x0); - - if (mdp->enabled) { - clk_disable_unprepare(mdp->clk_mm); - clk_disable_unprepare(mdp->clk_main); - } + if (!state->enabled && mdp->enabled) { + mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, + mdp->data->enable_mask, 0x0); + clk_disable_unprepare(mdp->clk_mm); + clk_disable_unprepare(mdp->clk_main); mdp->enabled = false; return 0;