diff mbox series

[v5,5/5] dt-bindings: clocks: at91sam9x5-sckc: convert to yaml

Message ID 20230517094119.2894220-6-claudiu.beznea@microchip.com
State New
Headers
Series dt-bindings: clocks: at91: convert to yaml |

Commit Message

Claudiu Beznea May 17, 2023, 9:41 a.m. UTC 
  Convert Atmel slow clock controller documentation to yaml.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/clock/at91-clock.txt  | 30 --------
 .../bindings/clock/atmel,at91sam9x5-sckc.yaml | 70 +++++++++++++++++++
 2 files changed, 70 insertions(+), 30 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/clock/at91-clock.txt
 create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml

Comments

Krzysztof Kozlowski May 17, 2023, 2:15 p.m. UTC | #1 
On Wed, 17 May 2023 12:41:19 +0300, Claudiu Beznea wrote:
> Convert Atmel slow clock controller documentation to yaml.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>  .../devicetree/bindings/clock/at91-clock.txt  | 30 --------
>  .../bindings/clock/atmel,at91sam9x5-sckc.yaml | 70 +++++++++++++++++++
>  2 files changed, 70 insertions(+), 30 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/clock/at91-clock.txt
>  create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/1782586


sckc@fffffe50: '#clock-cells' is a required property
	arch/arm/boot/dts/at91sam9n12ek.dtb

sckc@fffffe50: 'clocks' is a required property
	arch/arm/boot/dts/at91sam9n12ek.dtb

sckc@fffffe50: 'slck', 'slow_osc', 'slow_rc_osc' do not match any of the regexes: 'pinctrl-[0-9]+'
	arch/arm/boot/dts/at91sam9n12ek.dtb
Claudiu Beznea May 18, 2023, 8:31 a.m. UTC | #2 
On 17.05.2023 17:15, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On Wed, 17 May 2023 12:41:19 +0300, Claudiu Beznea wrote:
>> Convert Atmel slow clock controller documentation to yaml.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> ---
>>  .../devicetree/bindings/clock/at91-clock.txt  | 30 --------
>>  .../bindings/clock/atmel,at91sam9x5-sckc.yaml | 70 +++++++++++++++++++
>>  2 files changed, 70 insertions(+), 30 deletions(-)
>>  delete mode 100644 Documentation/devicetree/bindings/clock/at91-clock.txt
>>  create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
>>
> 
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
> 
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
> 
> Full log is available here: https://patchwork.ozlabs.org/patch/1782586
> 
> 
> sckc@fffffe50: '#clock-cells' is a required property
>         arch/arm/boot/dts/at91sam9n12ek.dtb
> 
> sckc@fffffe50: 'clocks' is a required property
>         arch/arm/boot/dts/at91sam9n12ek.dtb
> 
> sckc@fffffe50: 'slck', 'slow_osc', 'slow_rc_osc' do not match any of the regexes: 'pinctrl-[0-9]+'
>         arch/arm/boot/dts/at91sam9n12ek.dtb

Is it possible that this has been checked on a wrong base? I'm asking this
because:
- patch 3/5 in this series uses proper bindings for slow clock controller
  on at91sam9n12.dtsi (which includes #clock-cells and clocks bindings and
  removes slck, slow_osc, slow_rc_osc)
- patch 4/5 in this series does s/sckc@/clock-controller@/ in all AT91
  device trees.

Moreover, I've re-checked all the individual dtsi files that describes a
slow clock controller and all descriptions has the "#clock-cells", "clocks"
property available and no slck, slow_osc, slow_rc_osc as childs of
sckc@fffffe50.

If not, could you please let me know your checker command?

Thank you,
Claudiu
Krzysztof Kozlowski May 18, 2023, 12:11 p.m. UTC | #3 
On 18/05/2023 10:31, Claudiu.Beznea@microchip.com wrote:
> On 17.05.2023 17:15, Krzysztof Kozlowski wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> On Wed, 17 May 2023 12:41:19 +0300, Claudiu Beznea wrote:
>>> Convert Atmel slow clock controller documentation to yaml.
>>>
>>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>> ---
>>>  .../devicetree/bindings/clock/at91-clock.txt  | 30 --------
>>>  .../bindings/clock/atmel,at91sam9x5-sckc.yaml | 70 +++++++++++++++++++
>>>  2 files changed, 70 insertions(+), 30 deletions(-)
>>>  delete mode 100644 Documentation/devicetree/bindings/clock/at91-clock.txt
>>>  create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
>>>
>>
>> Running 'make dtbs_check' with the schema in this patch gives the
>> following warnings. Consider if they are expected or the schema is
>> incorrect. These may not be new warnings.
>>
>> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
>> This will change in the future.
>>
>> Full log is available here: https://patchwork.ozlabs.org/patch/1782586
>>
>>
>> sckc@fffffe50: '#clock-cells' is a required property
>>         arch/arm/boot/dts/at91sam9n12ek.dtb
>>
>> sckc@fffffe50: 'clocks' is a required property
>>         arch/arm/boot/dts/at91sam9n12ek.dtb
>>
>> sckc@fffffe50: 'slck', 'slow_osc', 'slow_rc_osc' do not match any of the regexes: 'pinctrl-[0-9]+'
>>         arch/arm/boot/dts/at91sam9n12ek.dtb
> 
> Is it possible that this has been checked on a wrong base? I'm asking this
> because:
> - patch 3/5 in this series uses proper bindings for slow clock controller
>   on at91sam9n12.dtsi (which includes #clock-cells and clocks bindings and
>   removes slck, slow_osc, slow_rc_osc)
> - patch 4/5 in this series does s/sckc@/clock-controller@/ in all AT91
>   device trees.

Yes, it is quite likely. It's up to you to investigate it or ignore if
you are sure report is a false positive.

> 
> Moreover, I've re-checked all the individual dtsi files that describes a
> slow clock controller and all descriptions has the "#clock-cells", "clocks"
> property available and no slck, slow_osc, slow_rc_osc as childs of
> sckc@fffffe50.
> 
> If not, could you please let me know your checker command?


make dbts_check

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt
deleted file mode 100644
index 57394785d3b0..000000000000
--- a/Documentation/devicetree/bindings/clock/at91-clock.txt
+++ /dev/null
@@ -1,30 +0,0 @@ 
-Device Tree Clock bindings for arch-at91
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Slow Clock controller:
-
-Required properties:
-- compatible : shall be one of the following:
-	"atmel,at91sam9x5-sckc",
-	"atmel,sama5d3-sckc",
-	"atmel,sama5d4-sckc" or
-	"microchip,sam9x60-sckc":
-		at91 SCKC (Slow Clock Controller)
-- #clock-cells : shall be 1 for "microchip,sam9x60-sckc" otherwise shall be 0.
-- clocks : shall be the input parent clock phandle for the clock.
-
-Optional properties:
-- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
-  provided on XIN.
-
-For example:
-	sckc@fffffe50 {
-		compatible = "atmel,at91sam9x5-sckc";
-		reg = <0xfffffe50 0x4>;
-		clocks = <&slow_xtal>;
-		#clock-cells = <0>;
-	};
-
diff --git a/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml b/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
new file mode 100644
index 000000000000..7be29877e6d2
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
@@ -0,0 +1,70 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Slow Clock Controller (SCKC)
+
+maintainers:
+  - Claudiu Beznea <claudiu.beznea@microchip.com>
+
+properties:
+  compatible:
+    oneOf:
+      - enum:
+          - atmel,at91sam9x5-sckc
+          - atmel,sama5d3-sckc
+          - atmel,sama5d4-sckc
+          - microchip,sam9x60-sckc
+      - items:
+          - const: microchip,sama7g5-sckc
+          - const: microchip,sam9x60-sckc
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  "#clock-cells":
+    enum: [0, 1]
+
+  atmel,osc-bypass:
+    type: boolean
+    description: set when a clock signal is directly provided on XIN
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - "#clock-cells"
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - microchip,sam9x60-sckc
+    then:
+      properties:
+        "#clock-cells":
+          const: 1
+    else:
+      properties:
+        "#clock-cells":
+          const: 0
+
+additionalProperties: false
+
+examples:
+  - |
+    clk32k: clock-controller@fffffe50 {
+        compatible = "microchip,sam9x60-sckc";
+        reg = <0xfffffe50 0x4>;
+        clocks = <&slow_xtal>;
+        #clock-cells = <1>;
+    };
+
+...