From patchwork Mon May 15 07:10:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bard Liao X-Patchwork-Id: 93917 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp6727006vqo; Mon, 15 May 2023 00:16:10 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ53w69jT6J0C4cBYKiLlryaHZDpkBAKZixSNP7WUHJMpoLt3mLz6hX7xGaNF5nDI8ApL151 X-Received: by 2002:a17:90a:fd8e:b0:250:2922:1f3c with SMTP id cx14-20020a17090afd8e00b0025029221f3cmr34049252pjb.33.1684134970353; Mon, 15 May 2023 00:16:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684134970; cv=none; d=google.com; s=arc-20160816; b=KNExHpak6bI/92zZ+n75qAGCpoWw+ozVk+rCtJxP5o2LEUJM/LDnOo+zJiDQmi8eWV 6owgb1gYTHedLzxR4EH1oZ/drxTJM37Y9FIhu665wtfzrz8EeU78N1WwVkJ0SyxMQTt+ lysxSNjl0Q70Q5va2bR9XqFHoOYON5gzSCkJBBfQq+swplFZ2QyQpUVu98gVVw1v4lki 9CMQlNdVyMukizahBgcuCIXX/Wmv0/ABnyuvEsfkdUZQABk7N2Tl5oX9sMypjlF52qXT 3yKiVl9cqrONrc/krukfsP4p8OeTJbPP3Xp5YvQQUYUmVY6Z4dv/sVg6qLvvYb8yF0/v oqsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=TnGCqRNvSF7cM39BYxj+PHoEsbgY/zcrEgNOoMiMnJs=; b=wxz0O+ChwCjkAXnE8yjY4mwqE9Llad+K0BK1+gLKB99367sePlBsuIH8DRE4L+OO8l 378Y7gHbqszOVynVZ4jTGzmkJHBFnA+h1BE2XfwvrlyzNDvYGeZQJynm9Iab7CjNBV0n KixkY0ch6tSdL3f5kFOOckgyMWOxlUm7qaIvUCtdBaVqWP1KnmihFSdHBpsbVV13JgH4 +BLgzkjrpV9t5tYPF2pFXh9tv2RfTF53hQd210+yG5YE3vrc0DdFRoCjS4fk1KSFGAvZ szpGrDQSQP+vTl/oXLHV1xYE5fyyyuMpdfzfIImRsPtcwHPm4oZczLmavTwV9qKb0khk roXQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="WT6/sr+G"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m2-20020a1709026bc200b001a4f1a956d8si12055211plt.57.2023.05.15.00.15.58; Mon, 15 May 2023 00:16:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="WT6/sr+G"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240442AbjEOGwb (ORCPT + 99 others); Mon, 15 May 2023 02:52:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240454AbjEOGwK (ORCPT ); Mon, 15 May 2023 02:52:10 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D2D892101 for ; Sun, 14 May 2023 23:51:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684133507; x=1715669507; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zulnEGWCaE/ce7on2AHJOrEISXuutjX2aua9tmM2yVE=; b=WT6/sr+GjCk608Rgj65IJ2nebMUTwi178AL1Kp1f0n6v2MbpwaJEP69+ D97nwjSW6Nlv1JgEVQmmxBxYIRL6AaXmG9w3DJY1CL29wkSezALDU+zg/ ugze5Gt+PwEkCGMTX7A25yAw38flW3MjVsSmFgNlc1c/f4SzpiAMtvyKV GdVyQ5RSedoL/+7HziQ1dA9j9dntWeHwi6ntCTCoO2sBRdutciErm+XTT tzlo6SYj6xo4nGji2zm7u9TfJ6+oEupsU687RI48adLWrrweIq4Kk5Smw hC5SiIA7JOdrDLBKNDHptdJ4mG4UL3jA+aIAvEioEMdFAJFOnnHaLfyZz g==; X-IronPort-AV: E=McAfee;i="6600,9927,10710"; a="349966479" X-IronPort-AV: E=Sophos;i="5.99,275,1677571200"; d="scan'208";a="349966479" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2023 23:51:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10710"; a="694908748" X-IronPort-AV: E=Sophos;i="5.99,275,1677571200"; d="scan'208";a="694908748" Received: from bard-ubuntu.sh.intel.com ([10.239.185.57]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2023 23:50:59 -0700 From: Bard Liao To: alsa-devel@alsa-project.org, vkoul@kernel.org, broonie@kernel.org, tiwai@suse.de Cc: linux-kernel@vger.kernel.org, vinod.koul@linaro.org, pierre-louis.bossart@linux.intel.com, bard.liao@intel.com Subject: [PATCH v2 17/26] soundwire: intel_ace2x: enable wake support Date: Mon, 15 May 2023 15:10:33 +0800 Message-Id: <20230515071042.2038-18-yung-chuan.liao@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230515071042.2038-1-yung-chuan.liao@linux.intel.com> References: <20230515071042.2038-1-yung-chuan.liao@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765943510558771010?= X-GMAIL-MSGID: =?utf-8?q?1765943510558771010?= From: Pierre-Louis Bossart The WAKEEN and WAKESTS registers were moved to the per-link SHIM_VS area. Signed-off-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Péter Ujfalusi Reviewed-by: Ranjani Sridharan Signed-off-by: Bard Liao --- drivers/soundwire/intel_ace2x.c | 38 +++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/soundwire/intel_ace2x.c b/drivers/soundwire/intel_ace2x.c index 2e33e8a00b55..fe950b3ea3bc 100644 --- a/drivers/soundwire/intel_ace2x.c +++ b/drivers/soundwire/intel_ace2x.c @@ -31,6 +31,41 @@ static void intel_shim_vs_init(struct sdw_intel *sdw) usleep_range(10, 15); } +static int intel_shim_check_wake(struct sdw_intel *sdw) +{ + void __iomem *shim_vs; + u16 wake_sts; + + shim_vs = sdw->link_res->shim_vs; + wake_sts = intel_readw(shim_vs, SDW_SHIM2_INTEL_VS_WAKESTS); + + return wake_sts & SDW_SHIM2_INTEL_VS_WAKEEN_PWS; +} + +static void intel_shim_wake(struct sdw_intel *sdw, bool wake_enable) +{ + void __iomem *shim_vs = sdw->link_res->shim_vs; + u16 wake_en; + u16 wake_sts; + + wake_en = intel_readw(shim_vs, SDW_SHIM2_INTEL_VS_WAKEEN); + + if (wake_enable) { + /* Enable the wakeup */ + wake_en |= SDW_SHIM2_INTEL_VS_WAKEEN_PWE; + intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_WAKEEN, wake_en); + } else { + /* Disable the wake up interrupt */ + wake_en &= ~SDW_SHIM2_INTEL_VS_WAKEEN_PWE; + intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_WAKEEN, wake_en); + + /* Clear wake status (W1C) */ + wake_sts = intel_readw(shim_vs, SDW_SHIM2_INTEL_VS_WAKESTS); + wake_sts |= SDW_SHIM2_INTEL_VS_WAKEEN_PWS; + intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_WAKESTS, wake_sts); + } +} + static int intel_link_power_up(struct sdw_intel *sdw) { struct sdw_bus *bus = &sdw->cdns.bus; @@ -325,6 +360,9 @@ const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = { .link_power_up = intel_link_power_up, .link_power_down = intel_link_power_down, + .shim_check_wake = intel_shim_check_wake, + .shim_wake = intel_shim_wake, + .sync_arm = intel_sync_arm, .sync_go_unlocked = intel_sync_go_unlocked, .sync_go = intel_sync_go,