[v3,2/2] arm64: dts: ti: k3-j7200-mcu-wakeup: Update fss node and hbmc_mux
Commit Message
From: Nishanth Menon <nm@ti.com>
FSS node claims to be a syscon node, while it actually is a simple bus
where OSPI, HBMC peripherals are located and a mux for path select
between OSPI and Hyperbus which can be modelled as a reg-mux. So model
it accordingly and use reg-mux to describe the hbmc_mux.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
---
V2->V3:
* Keep register regions unchanged as it is correct according to memory
map.
* Update commit messages as per Vignesh's suggestion.
V1->V2:
* Address feedback from Udit to limit the FSS register region size as
per TRM.
* Use reg-mux changes to simplify the hbmc-mux modelling.
* Update commit message to reflect changes.
Depends on:
https://lore.kernel.org/all/20230424184810.29453-1-afd@ti.com/
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
@@ -338,15 +338,16 @@
status = "disabled";
};
- fss: syscon@47000000 {
- compatible = "syscon", "simple-mfd";
+ fss: bus@47000000 {
+ compatible = "simple-bus";
reg = <0x00 0x47000000 0x00 0x100>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
- hbmc_mux: hbmc-mux {
- compatible = "mmio-mux";
+ hbmc_mux: mux-controller@47000004 {
+ compatible = "reg-mux";
+ reg = <0x00 0x47000004 0x00 0x2>;
#mux-control-cells = <1>;
mux-reg-masks = <0x4 0x2>; /* HBMC select */
};