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[2620:137:e000::1:20]) by mx.google.com with ESMTP id t5-20020a170902e84500b0019a826d3054si3121756plg.640.2023.05.09.21.00.01; Tue, 09 May 2023 21:00:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=iD9jMFcc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235465AbjEJDvl (ORCPT + 99 others); Tue, 9 May 2023 23:51:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52036 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229524AbjEJDvi (ORCPT ); Tue, 9 May 2023 23:51:38 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4790D2106; Tue, 9 May 2023 20:51:37 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34A2jZWY027375; Wed, 10 May 2023 03:19:38 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=VLjjbxbyLJgcjuKBoiwAEH2JhKcIvhislXcoK2XU9a4=; b=iD9jMFccvWLQBKVfivDxRutLIF3koJ4AQQtl4L1F4sHtsmfaGY6ua2kocjBuwnmbrdPs utFIBe44VXIEJ7VCb4ivP7vPhqVJKURJ9m2ztwRc1YPqOwJfU/ERWYMnw5OkFYh2HVAM HhjQXm/Tbklm8z4/JTdV8AODWGvU5cbWGfuyokz/UB3cTeTnropEsZPk4rz8Mid3roB3 TGiRXg42zo3O4zoKn7CNrBrtQsssfoy1tAk26+wLz/T+HyJSg6NczT9pfN7GKgSHAVC4 /dLjOYmir+VGdN1+q4dDY9525DlvsQlEXZfchuby8qWDRFcMAvF7U7caCj1WOCEv+WWx CA== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qf77g3dq9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 10 May 2023 03:19:38 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34A3JbUo016032 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 10 May 2023 03:19:37 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Tue, 9 May 2023 20:19:37 -0700 From: Bjorn Andersson To: Bjorn Andersson , Konrad Dybcio , Johan Hovold CC: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , , , , , Abel Vesa , Steev Klimaszewski , Neil Armstrong , Johan Hovold Subject: [PATCH v2 7/8] arm64: dts: qcom: sc8280xp-crd: Add QMP to SuperSpeed graph Date: Tue, 9 May 2023 20:19:29 -0700 Message-ID: <20230510031930.1996020-8-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230510031930.1996020-1-quic_bjorande@quicinc.com> References: <20230510031930.1996020-1-quic_bjorande@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 0rXELhCrcRv1Tgwxf2LYTKFJHGXYKhRT X-Proofpoint-ORIG-GUID: 0rXELhCrcRv1Tgwxf2LYTKFJHGXYKhRT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-09_16,2023-05-05_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 mlxlogscore=999 malwarescore=0 clxscore=1015 mlxscore=0 suspectscore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305100024 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765478198402365885?= X-GMAIL-MSGID: =?utf-8?q?1765478198402365885?= With support for the QMP combo phy to react to USB Type-C switch events, introduce it as the next hop for the SuperSpeed lanes of the two USB Type-C connectors, and connect the output of the DisplayPort controller to the QMP combo phy. This allows the TCPM to perform orientation switching of both USB and DisplayPort signals. Signed-off-by: Bjorn Andersson Tested-by: Abel Vesa Tested-by: Steev Klimaszewski Tested-by: Neil Armstrong # on HDK8450 Tested-by: Johan Hovold # X13s Reviewed-by: Johan Hovold --- Changes since v1: - DP input is port@2 arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 28 ++++++++++++++++--- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 34 +++++++++++++++++++++++ 2 files changed, 58 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index 547277924ea3..33c973661fa5 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -64,7 +64,7 @@ port@1 { reg = <1>; pmic_glink_con0_ss: endpoint { - remote-endpoint = <&mdss0_dp0_out>; + remote-endpoint = <&usb_0_qmpphy_out>; }; }; @@ -99,7 +99,7 @@ port@1 { reg = <1>; pmic_glink_con1_ss: endpoint { - remote-endpoint = <&mdss0_dp1_out>; + remote-endpoint = <&usb_1_qmpphy_out>; }; }; @@ -412,7 +412,7 @@ &mdss0_dp0 { &mdss0_dp0_out { data-lanes = <0 1>; - remote-endpoint = <&pmic_glink_con0_ss>; + remote-endpoint = <&usb_0_qmpphy_dp_in>; }; &mdss0_dp1 { @@ -421,7 +421,7 @@ &mdss0_dp1 { &mdss0_dp1_out { data-lanes = <0 1>; - remote-endpoint = <&pmic_glink_con1_ss>; + remote-endpoint = <&usb_1_qmpphy_dp_in>; }; &mdss0_dp3 { @@ -670,9 +670,19 @@ &usb_0_qmpphy { vdda-phy-supply = <&vreg_l9d>; vdda-pll-supply = <&vreg_l4d>; + orientation-switch; + status = "okay"; }; +&usb_0_qmpphy_dp_in { + remote-endpoint = <&mdss0_dp0_out>; +}; + +&usb_0_qmpphy_out { + remote-endpoint = <&pmic_glink_con0_ss>; +}; + &usb_0_role_switch { remote-endpoint = <&pmic_glink_con0_hs>; }; @@ -697,9 +707,19 @@ &usb_1_qmpphy { vdda-phy-supply = <&vreg_l4b>; vdda-pll-supply = <&vreg_l3b>; + orientation-switch; + status = "okay"; }; +&usb_1_qmpphy_dp_in { + remote-endpoint = <&mdss0_dp1_out>; +}; + +&usb_1_qmpphy_out { + remote-endpoint = <&pmic_glink_con1_ss>; +}; + &usb_1_role_switch { remote-endpoint = <&pmic_glink_con1_hs>; }; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 0e691bb0120c..19686557efd0 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -3006,6 +3006,23 @@ usb_0_qmpphy: phy@88eb000 { #phy-cells = <1>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_0_qmpphy_out: endpoint {}; + }; + + port@2 { + reg = <2>; + + usb_0_qmpphy_dp_in: endpoint {}; + }; + }; }; usb_1_hsphy: phy@8902000 { @@ -3042,6 +3059,23 @@ usb_1_qmpphy: phy@8903000 { #phy-cells = <1>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_qmpphy_out: endpoint {}; + }; + + port@2 { + reg = <2>; + + usb_1_qmpphy_dp_in: endpoint {}; + }; + }; }; mdss1_dp0_phy: phy@8909a00 {