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Date: Sat, 6 May 2023 15:38:26 +0530 Message-ID: <20230506100826.1525641-1-u-kumar1@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765139612331936810?= X-GMAIL-MSGID: =?utf-8?q?1765139612331936810?= TI K3 SOCs have msmc sram, part of it can be configured as L3 cache depending upon system firmware configuration file. This could be possible to have no L3 cache or variable size of L3 cache. In either case top of 64KB of SRAM has to be reserved for system firmware called tifs. https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/general/core.html?highlight=msmc Section: TISCI_MSG_QUERY_MSMC. But u-boot as part of fix up is deleting sysfw and l3cache node before passing DT to OS https://github.com/u-boot/u-boot/blob/master/arch/arm/mach-k3/common.c#L412 But keeping tifs subnode as is, tifs subnode memory region is also not accessible to OS. In my view we can handle in two ways 1) delete tifs node as well In this case, only accessible sram will be visible to OS https://lore.kernel.org/all/20230420081128.3617214-1-u-kumar1@ti.com/ 2) make these nodes (tifs, atf and l3cache) as reserved, so that OS has complete view of memory. This is patch for option 2 to mark atf, l3-cache and tifs as reserved. and let u-boot to set correct size for these nodes as part of runtime fixup. Nishanth suggested to discuss in k.org group https://lore.kernel.org/all/20230502230022.5pjywy6h7oqrkmwh@elusive/ So sending this patch for suggestion for selection right option. Also other options are welcome. Signed-off-by: Udit Kumar --- Changes since v1: https://lore.kernel.org/all/20230503144706.1265672-1-u-kumar1@ti.com/ - remove cover letter for 1 patch arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index 2dd7865f7654..791993060f44 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -14,14 +14,17 @@ msmc_ram: sram@70000000 { ranges = <0x0 0x0 0x70000000 0x400000>; atf-sram@0 { + status = "reserved"; reg = <0x0 0x20000>; }; tifs-sram@1f0000 { + status = "reserved"; reg = <0x1f0000 0x10000>; }; l3cache-sram@200000 { + status = "reserved"; reg = <0x200000 0x200000>; }; };