From patchwork Fri May 5 20:58:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Beau Belgrave X-Patchwork-Id: 90584 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp695934vqo; Fri, 5 May 2023 14:21:28 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4po76qyMx5CXL1etbpboUoCYO2ZtfWD4gwdgRij1XD9VIGLlkQDivz4+/NSrJMM9pF2cCd X-Received: by 2002:a05:6a00:a8d:b0:641:24bb:bbb1 with SMTP id b13-20020a056a000a8d00b0064124bbbbb1mr4626239pfl.27.1683321688045; Fri, 05 May 2023 14:21:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683321688; cv=none; d=google.com; s=arc-20160816; b=Apv8K9FaUUsxNpSAZ5HUAPPos9IPzOtq6wnBIAdn/ziTOK8ni4rS0Gv+AOcu3yHIi2 JomDqlQZzOFkLmz8YVF0/T8bezHIOleY2rR1V0M6gyYtkCsdi5dBxj97mVp8AqK+p5eT R/8PSfbNldQ8MByNzR4lPbeQ3dkGDAduX3KM04a7KpFU/b2da3M2GTh9nh57Yt77lOFM qQZm5NG5rkjxvV2yxSt/nTSi98RRvc2uEK8K7tJBj9xjWCUH5gr6ekVBDYIZgaqtMpyX x6CACo26BFhSUXFTzc+H62izMs77oLzcexmKat7A9ZAo1QF9e1qJeae0iKcYkMVMvs6f daIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature:dkim-filter; bh=Sy+d1mqucnUH/6CC12rPWwsujA9U/FCYF4OoGbHtNc0=; b=HWKATaHXo3pW8K8KcEBVCWpZzG4jpI+jf/GVxSw9Rebmbr5SC6rCteO/4G5QTigwQZ f7Qay/CeKSpdbxbpz4lzBJNzmh6a9WXhdtWVVGfTB5QDv/99BtGp2rhu5fTi/Uyd0svn J0rQ6LYFPkYdFXExTS1+WTTtpwrGRqy+YgSYhgbqtA1xEAkv9s1ytrte6+MsAT5sw79z tlnsSOVhflX0dce9Ie8XiN5E3Lfd5Lfx8Qyw3xhWTuIgBeL6AqbqBI+9JOWy3dH61Kbw 95FAmxQnd0vngddfUIVYU2fxlbZqgIEMZ8ef459isy+LALzZsYs4GXkTknbwHFwfIggw IGGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linux.microsoft.com header.s=default header.b=kqbbjL16; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linux.microsoft.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id t185-20020a6381c2000000b0051a096769d2si3018402pgd.628.2023.05.05.14.21.12; Fri, 05 May 2023 14:21:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linux.microsoft.com header.s=default header.b=kqbbjL16; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linux.microsoft.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230127AbjEEU7N (ORCPT + 99 others); Fri, 5 May 2023 16:59:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233185AbjEEU7L (ORCPT ); Fri, 5 May 2023 16:59:11 -0400 Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B1EF44EE1; Fri, 5 May 2023 13:59:04 -0700 (PDT) Received: from W11-BEAU-MD.localdomain (unknown [76.135.27.212]) by linux.microsoft.com (Postfix) with ESMTPSA id 00CEF20EA205; Fri, 5 May 2023 13:59:03 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 00CEF20EA205 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1683320344; bh=Sy+d1mqucnUH/6CC12rPWwsujA9U/FCYF4OoGbHtNc0=; h=From:To:Cc:Subject:Date:From; b=kqbbjL167LT11+ZWPWWZ8LrgjqgxyKUm0TBDZBDHDeDEg+ZFonBELkxv3OKKaHCUV vxiICGhP8bjW7aY2DU0lTw3gu3CMBvw7mHKpXhQ1MAjMLERihdMf9hWPlonFm1i5I2 SKTcxR8gGr/4WR6SR2oRkNrZ9XmcN2PyppJ/wWVY= From: Beau Belgrave To: rostedt@goodmis.org, mhiramat@kernel.org Cc: linux-kernel@vger.kernel.org, linux-trace-kernel@vger.kernel.org, dan.carpenter@linaro.org Subject: [PATCH] tracing/user_events: Use long vs int for atomic bit ops Date: Fri, 5 May 2023 13:58:55 -0700 Message-Id: <20230505205855.6407-1-beaub@linux.microsoft.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-19.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,USER_IN_DEF_DKIM_WL, USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1765090722002088037?= X-GMAIL-MSGID: =?utf-8?q?1765090722002088037?= Each event stores a int to track which bit to set/clear when enablement changes. On big endian 64-bit configurations, it's possible this could cause memory corruption when it's used for atomic bit operations. Use unsigned long for enablement values to ensure any possible corruption cannot occur. Downcast to int after mask for the bit target. Link: https://lore.kernel.org/all/6f758683-4e5e-41c3-9b05-9efc703e827c@kili.mountain/ Fixes: dcb8177c1395 ("tracing/user_events: Add ioctl for disabling addresses") Reported-by: Dan Carpenter Signed-off-by: Beau Belgrave --- kernel/trace/trace_events_user.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) base-commit: 3862f86c1529fa0016de6344eb974877b4cd3838 diff --git a/kernel/trace/trace_events_user.c b/kernel/trace/trace_events_user.c index b1ecd7677642..e37c7f168c44 100644 --- a/kernel/trace/trace_events_user.c +++ b/kernel/trace/trace_events_user.c @@ -101,7 +101,7 @@ struct user_event_enabler { unsigned long addr; /* Track enable bit, flags, etc. Aligned for bitops. */ - unsigned int values; + unsigned long values; }; /* Bits 0-5 are for the bit to update upon enable/disable (0-63 allowed) */ @@ -116,7 +116,9 @@ struct user_event_enabler { /* Only duplicate the bit value */ #define ENABLE_VAL_DUP_MASK ENABLE_VAL_BIT_MASK -#define ENABLE_BITOPS(e) ((unsigned long *)&(e)->values) +#define ENABLE_BITOPS(e) (&(e)->values) + +#define ENABLE_BIT(e) ((int)((e)->values & ENABLE_VAL_BIT_MASK)) /* Used for asynchronous faulting in of pages */ struct user_event_enabler_fault { @@ -423,9 +425,9 @@ static int user_event_enabler_write(struct user_event_mm *mm, /* Update bit atomically, user tracers must be atomic as well */ if (enabler->event && enabler->event->status) - set_bit(enabler->values & ENABLE_VAL_BIT_MASK, ptr); + set_bit(ENABLE_BIT(enabler), ptr); else - clear_bit(enabler->values & ENABLE_VAL_BIT_MASK, ptr); + clear_bit(ENABLE_BIT(enabler), ptr); kunmap_local(kaddr); unpin_user_pages_dirty_lock(&page, 1, true); @@ -440,8 +442,7 @@ static bool user_event_enabler_exists(struct user_event_mm *mm, struct user_event_enabler *next; list_for_each_entry_safe(enabler, next, &mm->enablers, link) { - if (enabler->addr == uaddr && - (enabler->values & ENABLE_VAL_BIT_MASK) == bit) + if (enabler->addr == uaddr && ENABLE_BIT(enabler) == bit) return true; } @@ -2272,7 +2273,7 @@ static long user_events_ioctl_unreg(unsigned long uarg) list_for_each_entry_safe(enabler, next, &mm->enablers, link) if (enabler->addr == reg.disable_addr && - (enabler->values & ENABLE_VAL_BIT_MASK) == reg.disable_bit) { + ENABLE_BIT(enabler) == reg.disable_bit) { set_bit(ENABLE_VAL_FREEING_BIT, ENABLE_BITOPS(enabler)); if (!test_bit(ENABLE_VAL_FAULTING_BIT, ENABLE_BITOPS(enabler)))