Message ID | 20230504082644.1461582-5-bhupesh.sharma@linaro.org |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp154538vqo; Thu, 4 May 2023 01:53:06 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6143xXmXRf+cEyQYEINv+0Q0THp2OyLNBZATOfhIqMszlB/v6BLkAMsBgUfvRPaaDeqK8X X-Received: by 2002:a17:90a:d202:b0:24d:fb8c:5ab3 with SMTP id o2-20020a17090ad20200b0024dfb8c5ab3mr1385890pju.24.1683190385777; Thu, 04 May 2023 01:53:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1683190385; cv=none; d=google.com; s=arc-20160816; b=FxJgc8oHIX6qRK3VOG5V1NNLrttWYy60pWl1FEDgCI3qhvwW5x6EXAJPod51nKeHLC 9Y5iLztbrnKf8KgatwrCAWPHHxdL11t80aHSuki5mlcvv0HaExi6x+0Pu0KOqgDeW7rS 3rtyaC4nlJfAgF9k3ICsrVSD47sZOGpHzYqgA5iySKtRrC9BGLMnvKbQBYOmEXUBv4id lHsR9kljWD1VjHkLANIQSMXX+k/gJS2FdT3L+PSXciaUtL5Sj56qv0hfqzFhRve7m/X/ hamjiFyRA56vUdgNRyQXCYe9EKcHHdo55wHIZc9KHG9z0Qt8kEPytLFfe99GY6iqBWlB mXZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=COJNbf8X1QXmXQi0xblWwRsADPSolif0cLFJONfAOSY=; b=iDnSudjsh290NTwfyQZCLgFHpnbTuQvpQHnsHHTspxJt2SRBIS1IgvSKyYKhpFyy95 hCs03vEW9KK6z0kYovPuoGBEgxpyNGNWVIBrvYnEOkIp9liM0INvHi68xQXFWVCSwcZN f6uKL1Cdq9L2v+FH2+6v8kf5J7yzFUU2Jq20AhTetnU87WzCvyNhMLbKBlHFebfomoxn BhuuZgkHC9DjyO6GEboi+K/SfqM91HXTH5q6Roy8JIkz3HrA2Y2IfD9SOKBrAiPI/ytk TmaMEUVqThR33K/wmhbS1sZyHceVJei4qE/Fm495WmSmmdm2idRnfYQC3k5R6sOdk/aY wukw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jS5Ks9QK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s6-20020a17090302c600b0019b090e497esi36386843plk.298.2023.05.04.01.52.49; Thu, 04 May 2023 01:53:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jS5Ks9QK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230365AbjEDIap (ORCPT <rfc822;lhua1029@gmail.com> + 99 others); Thu, 4 May 2023 04:30:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38628 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229733AbjEDIaT (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 4 May 2023 04:30:19 -0400 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97A7C127 for <linux-kernel@vger.kernel.org>; Thu, 4 May 2023 01:27:28 -0700 (PDT) Received: by mail-pf1-x42f.google.com with SMTP id d2e1a72fcca58-64115e652eeso10753171b3a.0 for <linux-kernel@vger.kernel.org>; Thu, 04 May 2023 01:27:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683188847; x=1685780847; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=COJNbf8X1QXmXQi0xblWwRsADPSolif0cLFJONfAOSY=; b=jS5Ks9QKbtZG86PD7o8WW1wCSZ+5f//pd5Ym3kY59p/4EsygOn+psSvk9YGkswETvM WYP/iEUIu+WOMMU+NrhU16of7CdeCFKhX7222BgtQF/xLC7jB5o9rplx1OD4uOkYGFf/ CsjDUJjyJhI8uWJduemRdPWdmaDympOWfUPG4OBLT0jLMV8/h/iIVd9BDMIhvZBqngmD xblEFOr/NguajqFWhb+wk1xIu8Y0nkoVfNs7Gqqc3jsRRt8VhWvaisgM1SOfK0CA/dMz fkf8Ic53cpeUsmVZul8PilH3IfihN858qMhcEMLS4hB73WfvOkZooeyo8b7ALsZSNvw5 FhpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683188847; x=1685780847; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=COJNbf8X1QXmXQi0xblWwRsADPSolif0cLFJONfAOSY=; b=b3qCr9/GH52vaG/WWtGHNxYtekPZETQ3AeVRa5U/0P72naFAragqFvk2DidH7aTNiW R5YFR7hm/ddP/D860TpQIxC3hMhBAz13g7BFcmP3MjTaoQXkj3OJiHf2owLY5Nmq88GL BL62trTtb2L4sXIGFXBje+qv6fUZ3RiyfeZOYNSLtBpfondVfRl34CYpM6YunQ6p9mbC J4D0J5BdAerB43iUtHN0Db9T0lQuy2wrZaL/xXFKM65ghgOv/oOs817PFQWoFYHhwGh+ tn3tk98UE5XD1/sE+HPIpCvir5FGG6Ny5Zai3ocPBcxKgo9PQm1C7ak7Lodn1Dqneaxp NedA== X-Gm-Message-State: AC+VfDyL64FZV/WJF7xGt+RlMc0Vu1z+7LEc4YysCjoX+KxzC9uLqrYv UbsnPAgWx+dGDlNfY32T6ib/lw== X-Received: by 2002:a05:6a00:23d5:b0:643:b00:8899 with SMTP id g21-20020a056a0023d500b006430b008899mr1389950pfc.15.1683188847354; Thu, 04 May 2023 01:27:27 -0700 (PDT) Received: from localhost.localdomain ([223.233.65.180]) by smtp.gmail.com with ESMTPSA id s1-20020a056a00178100b00625d84a0194sm24913973pfg.107.2023.05.04.01.27.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 May 2023 01:27:27 -0700 (PDT) From: Bhupesh Sharma <bhupesh.sharma@linaro.org> To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com, bhupesh.sharma@linaro.org, robh+dt@kernel.org, linux-usb@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org, krzysztof.kozlowski@linaro.org Subject: [PATCH v3 4/5] arm64: dts: qcom: sm6115: Add EUD dt node and dwc3 connector Date: Thu, 4 May 2023 13:56:43 +0530 Message-Id: <20230504082644.1461582-5-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230504082644.1461582-1-bhupesh.sharma@linaro.org> References: <20230504082644.1461582-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764953042335503275?= X-GMAIL-MSGID: =?utf-8?q?1764953042335503275?= |
Series |
Add Qualcomm SM6115 / SM4250 EUD dt-bindings & driver support
|
|
Commit Message
Bhupesh Sharma
May 4, 2023, 8:26 a.m. UTC
Add the Embedded USB Debugger(EUD) device tree node for
SM6115 / SM4250 SoC.
The node contains EUD base register region, EUD mode manager
register region and TCSR Base register region along with the
interrupt entry.
Also add the typec connector node for EUD which is attached to
EUD node via port. EUD is also attached to DWC3 node via port.
To enable the role switch, we need to set dr_mode = "otg" property
for 'usb_dwc3' sub-node in the board dts file.
Also the EUD device can be enabled on a board once linux is boot'ed
by setting:
$ echo 1 > /sys/bus/platform/drivers/qcom_eud/../enable
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 48 ++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
Comments
On 4.05.2023 10:26, Bhupesh Sharma wrote: > Add the Embedded USB Debugger(EUD) device tree node for > SM6115 / SM4250 SoC. > > The node contains EUD base register region, EUD mode manager > register region and TCSR Base register region along with the > interrupt entry. > > Also add the typec connector node for EUD which is attached to > EUD node via port. EUD is also attached to DWC3 node via port. > > To enable the role switch, we need to set dr_mode = "otg" property > for 'usb_dwc3' sub-node in the board dts file. > > Also the EUD device can be enabled on a board once linux is boot'ed > by setting: > $ echo 1 > /sys/bus/platform/drivers/qcom_eud/../enable > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- > arch/arm64/boot/dts/qcom/sm6115.dtsi | 48 ++++++++++++++++++++++++++++ > 1 file changed, 48 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > index f67863561f3f..6865342fc42f 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > @@ -180,6 +180,18 @@ core3 { > }; > }; > > + eud_typec: connector { > + compatible = "usb-c-connector"; > + > + ports { > + port@0 { > + con_eud: endpoint { > + remote-endpoint = <&eud_con>; > + }; > + }; > + }; > + }; > + > firmware { > scm: scm { > compatible = "qcom,scm-sm6115", "qcom,scm"; > @@ -647,6 +659,35 @@ gcc: clock-controller@1400000 { > #power-domain-cells = <1>; > }; > > + eud: eud@1610000 { > + compatible = "qcom,sm6115-eud", "qcom,eud"; > + reg = <0x0 0x01610000 0x0 0x2000>, > + <0x0 0x01612000 0x0 0x1000>, > + <0x0 0x003c0000 0x0 0x40000>; > + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; > + qcom,secure-mode-enable; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; Please insert a newline before each child node. Konrad > + eud_ep: endpoint { > + remote-endpoint = <&usb2_role_switch>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + eud_con: endpoint { > + remote-endpoint = <&con_eud>; > + }; > + }; > + }; > + }; > + > usb_hsphy: phy@1613000 { > compatible = "qcom,sm6115-qusb2-phy"; > reg = <0x0 0x01613000 0x0 0x180>; > @@ -1144,6 +1185,13 @@ usb_dwc3: usb@4e00000 { > snps,has-lpm-erratum; > snps,hird-threshold = /bits/ 8 <0x10>; > snps,usb3_lpm_capable; > + usb-role-switch; > + > + port { > + usb2_role_switch: endpoint { > + remote-endpoint = <&eud_ep>; > + }; > + }; > }; > }; >
On Thu, 4 May 2023 at 15:23, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > On 4.05.2023 10:26, Bhupesh Sharma wrote: > > Add the Embedded USB Debugger(EUD) device tree node for > > SM6115 / SM4250 SoC. > > > > The node contains EUD base register region, EUD mode manager > > register region and TCSR Base register region along with the > > interrupt entry. > > > > Also add the typec connector node for EUD which is attached to > > EUD node via port. EUD is also attached to DWC3 node via port. > > > > To enable the role switch, we need to set dr_mode = "otg" property > > for 'usb_dwc3' sub-node in the board dts file. > > > > Also the EUD device can be enabled on a board once linux is boot'ed > > by setting: > > $ echo 1 > /sys/bus/platform/drivers/qcom_eud/../enable > > > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/sm6115.dtsi | 48 ++++++++++++++++++++++++++++ > > 1 file changed, 48 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > > index f67863561f3f..6865342fc42f 100644 > > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > > @@ -180,6 +180,18 @@ core3 { > > }; > > }; > > > > + eud_typec: connector { > > + compatible = "usb-c-connector"; > > + > > + ports { > > + port@0 { > > + con_eud: endpoint { > > + remote-endpoint = <&eud_con>; > > + }; > > + }; > > + }; > > + }; > > + > > firmware { > > scm: scm { > > compatible = "qcom,scm-sm6115", "qcom,scm"; > > @@ -647,6 +659,35 @@ gcc: clock-controller@1400000 { > > #power-domain-cells = <1>; > > }; > > > > + eud: eud@1610000 { > > + compatible = "qcom,sm6115-eud", "qcom,eud"; > > + reg = <0x0 0x01610000 0x0 0x2000>, > > + <0x0 0x01612000 0x0 0x1000>, > > + <0x0 0x003c0000 0x0 0x40000>; > > + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; > > + qcom,secure-mode-enable; > > + status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > Please insert a newline before each child node. Ok, I will do it in next version. Thanks, Bhupesh
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index f67863561f3f..6865342fc42f 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -180,6 +180,18 @@ core3 { }; }; + eud_typec: connector { + compatible = "usb-c-connector"; + + ports { + port@0 { + con_eud: endpoint { + remote-endpoint = <&eud_con>; + }; + }; + }; + }; + firmware { scm: scm { compatible = "qcom,scm-sm6115", "qcom,scm"; @@ -647,6 +659,35 @@ gcc: clock-controller@1400000 { #power-domain-cells = <1>; }; + eud: eud@1610000 { + compatible = "qcom,sm6115-eud", "qcom,eud"; + reg = <0x0 0x01610000 0x0 0x2000>, + <0x0 0x01612000 0x0 0x1000>, + <0x0 0x003c0000 0x0 0x40000>; + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; + qcom,secure-mode-enable; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + eud_ep: endpoint { + remote-endpoint = <&usb2_role_switch>; + }; + }; + + port@1 { + reg = <1>; + eud_con: endpoint { + remote-endpoint = <&con_eud>; + }; + }; + }; + }; + usb_hsphy: phy@1613000 { compatible = "qcom,sm6115-qusb2-phy"; reg = <0x0 0x01613000 0x0 0x180>; @@ -1144,6 +1185,13 @@ usb_dwc3: usb@4e00000 { snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; snps,usb3_lpm_capable; + usb-role-switch; + + port { + usb2_role_switch: endpoint { + remote-endpoint = <&eud_ep>; + }; + }; }; };