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[2620:137:e000::1:20]) by mx.google.com with ESMTP id f2-20020a63f742000000b005073e333addsi32431037pgk.390.2023.05.03.00.15.57; Wed, 03 May 2023 00:16:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@marvell.com header.s=pfpt0220 header.b="iEBZW0B/"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=marvell.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229678AbjECHKV (ORCPT + 99 others); Wed, 3 May 2023 03:10:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229559AbjECHKU (ORCPT ); Wed, 3 May 2023 03:10:20 -0400 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13B9335B0; Wed, 3 May 2023 00:10:13 -0700 (PDT) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 342KDRwE026291; Wed, 3 May 2023 00:10:02 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=z6k/sUirye6gC9Hi9CvYYgb4LzEDa09KdOIf49LemB4=; b=iEBZW0B/QlAJyoejwYz1F+cHS1+qnJwdGSscQJ8k2BDk3SoRSA7BZYWfDR2uKK7f7lVY 38nR3m0rgWaUXrdDDcfqF23qJgZ3t4j9Ph9gQpcLz14D+mNSnrmdl0pW3YD9h6UDifHP 0Akib0t0Zze0wbROB1SvdkMGlIhekcIMI7RmBiCFX/nWxyGgspFu0ji41qFdYsIwWlxv cKtsO/GYcvS375bB9g8h0CGQ59gngyF6q9KxpXqQ8lVH6VsS4uWxGUppv1nebzbKhwGL GGnROSYLuUHhzp+Axba3CCWmw2Ae2Wa1pfcOBOlk6rvVTgatBnWLYN5jvWuoIneIWp4p Kg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3qavhenavq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 03 May 2023 00:10:02 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 3 May 2023 00:10:01 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 3 May 2023 00:10:00 -0700 Received: from hyd1425.marvell.com (unknown [10.29.37.83]) by maili.marvell.com (Postfix) with ESMTP id 76EF03F70B4; Wed, 3 May 2023 00:09:56 -0700 (PDT) From: Sai Krishna To: , , , , , , , , , , , , , CC: Ratheesh Kannoth , Sai Krishna Subject: [net PATCH v5 02/11] octeontx2-af: Fix start and end bit for scan config Date: Wed, 3 May 2023 12:39:35 +0530 Message-ID: <20230503070944.960190-3-saikrishnag@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230503070944.960190-1-saikrishnag@marvell.com> References: <20230503070944.960190-1-saikrishnag@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: prle1tTwbR5vhXbDGIg_2V0wX2lVIYv5 X-Proofpoint-GUID: prle1tTwbR5vhXbDGIg_2V0wX2lVIYv5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_04,2023-04-27_01,2023-02-09_01 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764856347785621234?= X-GMAIL-MSGID: =?utf-8?q?1764856347785621234?= From: Ratheesh Kannoth In the current driver, NPC exact match feature was not getting enabled as configured bit was not read properly. for_each_set_bit_from() need end bit as one bit post position in the bit map to read NPC exact nibble enable bits properly. This patch fixes the same. Fixes: b747923afff8 ("octeontx2-af: Exact match support") Signed-off-by: Ratheesh Kannoth Signed-off-by: Sunil Kovvuri Goutham Signed-off-by: Sai Krishna --- drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c index 006beb5cf98d..f15efd41972e 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c @@ -594,8 +594,7 @@ static int npc_scan_kex(struct rvu *rvu, int blkaddr, u8 intf) */ masked_cfg = cfg & NPC_EXACT_NIBBLE; bitnr = NPC_EXACT_NIBBLE_START; - for_each_set_bit_from(bitnr, (unsigned long *)&masked_cfg, - NPC_EXACT_NIBBLE_START) { + for_each_set_bit_from(bitnr, (unsigned long *)&masked_cfg, NPC_EXACT_NIBBLE_END + 1) { npc_scan_exact_result(mcam, bitnr, key_nibble, intf); key_nibble++; }